Re: How to make use of instruction scheduling to improve performance?

["吴曦" <wu dot andrew dot xi at gmail dot com>]

> > > > I am working on gcc 4.1.1 and itanium2 architecture. I instrumented
> > > > each ld and st instruction in final_scan_insn() by looking at the insn
> > > > template (These instrumentations are used to do some security checks).
> > > > These instrumentations incur high performance overhead when running
> > > > specint benchmarks. However, these instrumentations contain high
> > > > dependencies between instructions so that I want to use instruction
> > > > scheduling to improve the performance.
> > > >     In the current implementation, the instrumentations are emitted as
> > > > assembly instructions (not insns). What should I do to make use of the
> > > > instruction scheduler?
> > >
> > > If I understand your description, you are adding instrumentation code,
> > > and you want to expose that code to the scheduler.  What you need to
> > > do in that case is to add the code as RTL instructions before the
> > > scheduling pass runs.  You will need to figure out the RTL which will
> > > do what you want.  Then you will need to insert it around the
> >                                ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > > instructions which you want to instrument.  You will probably want to
> > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > Before the second scheduling pass, how to identify that one insn will
> > be output as a load instruction (or store instruction)? In the final,
> > i use get_insn_template() to do this matching. Can I use the same
> > method before the second scheduling pass? If not, would you mind
> > giving some hints? thx
>
> Please send followups to the mailing list, not just to me.  Thanks.
>
> You should just match on the RTL.  I don't know enough about the
> Itanium to tell you precisely what to look for.  But, for example, you
> might look for
>    s = single_set (PATTERN (insn));
>    if (s != NULL && (MEM_P (SET_SRC (s) || MEM_P (SET_DEST (s)))))
>      ...
>
> Ian
>

Thanks. I observe that the 2nd instruction scheduling happens after
the local and global allocation. However, in my instrumentation, I
need several registers to do computation, can I allocate registers to
do computation in the instrumentation code just before the 2nd
instruction scheduling? If so, would you mind giving some hints on the
interfaces that I could make use of.
   Besides,  what happens if I move the insertion of instrumentation
before register allocation,  or even before the 1st scheduling pass,
can I identify load/store instructions that early?