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Re: no_new_pseudos
Alexandre Oliva wrote:
> On Jul 2, 2007, Richard Earnshaw <Richard.Earnshaw@arm.com> wrote:
>
>
>> On Mon, 2007-07-02 at 12:10 -0400, Kenneth Zadeck wrote:
>>
>>> I do not remember if it was stevenb or bonzini that observed that
>>> because of changes that came with the dataflow branch it is now trivial
>>> to get rid of no_new_pseudos. All of the sets can just go away, as well
>>> as the tests of it that occur in passes that only run before reload.
>>>
>>> For those few passes that can run both before and after reload, the test
>>> would be replaced with a test of reload_completed.
>>>
>>> I believe that the original purpose of this was to protect certain
>>> datastructures that had to be resized manually when pseudos were added.
>>> However, all of these are gone, and have been replaced with structures
>>> inside of df that are automatically resized.
>>>
>>> Does anyone think this is a bad idea? A grep for no_new_pseudos bears
>>> out that nothing is really going on here anymore.
>>>
>
>
>> There are 199 uses of it in the backends; compared to 32 in the front
>> end.
>>
>
>
>> So it is quite heavily used by MD code.
>>
>
> I recall having used it a number of times in expanders that shouldn't
> create new pseudos during reload. These could easily be turned into
> (reload_in_progress || reload_completed). Maybe we could turn
> no_new_pseudos into a macro that expands to this?
>
>
199 reasons not to create pseudos.
I bootstrapped and regression tested this patch on ppc32, x86-64 and
ia-64 linuxes.
The backend was done pretty mechanically. This is important since i do
not plan to test every backend.
In the config directory i took the route of changing no_new_pseudos to
(reload_completed || reload_in_progress). This is safe and correct,
there my be some places to clean up.
David Edelsohn points out that some of the expanders could have all of
this code removed since expanders only run before reload. I do not know
how to figure this out.
The only thing else in the backends are the thunk generators which have
the references to no_new_pseudos removed.
The middle end changes either remove the references to no_new_pseudos if
the pass is only run before reload or changes the reference to
reload_completed.
OK for trunk?
Kenn
2007-07-02 Kenneth Zadeck <zadeck@naturalbridge.com>
* toplev.c (no_new_pseudos): Deleted.
* rtl.h (no_new_pseudos): Deleted.
* tree-pass.h (pass_no_new_pseudos): Deleted.
* passes.c (pass_no_new_pseudos): Deleted.
* final.c (rest_of_clean_state): Removed no_new_pseudos.
(rest_of_no_new_pseudos, pass_no_new_pseudos): Deleted.
* struct-equiv.c (rtx_equiv_p): Replaced no_new_pseudos with
reload_completed.
* emit-rtl.c (gen_reg_rtx): Ditto.
* cfgcleanup.c (try_crossjump_to_edge): Ditto.
* rtlhooks.c (gen_lowpart_general): Ditto.
* optabs.c (prepare_operand): Ditto.
* mode-switching.c (rest_of_handle_mode_switching): Deleted set of
no_new_pseudos.
* modulo-sched.c (rest_of_handle_sms): Ditto.
* see.c (rest_of_handle_see): Ditto.
* ifcvt.c (if_convert): Ditto.
(gate_handle_if_after_combine): Replaced no_new_pseudos with
reload_completed.
* init-regs.c (gate_initialize_regs): Deleted set of
no_new_pseudos.
* lower-subreg.c (decompose_multiword_subregs): Ditto.
* bb-reorder.c (rest_of_handle_partition_blocks): Ditto.
* config/alpha/alpha.c (alpha_legitimize_address,
alpha_emit_set_const_1, alpha_emit_set_const,
alpha_emit_conditional_move, alpha_split_conditional_move):
Replaced no_new_pseudos with (reload_completed || reload_in_progress).
* config/alpha/alpha.md: Ditto.
* config/frv/frv.md: Ditto.
* config/s390/s390.c (legitimize_tls_address): Ditto.
* config/s390/s390.md: Ditto.
* config/m32c/m32c.c (m32c_prepare_move, m32c_split_move,
m32c_expand_insv): Ditto.
* config/spu/spu.c (spu_split_immediate): Ditto.
* config/sparc/sparc.md: Ditto.
* config/sparc/sparc.c (legitimize_tls_address): Ditto.
(sparc_output_mi_thunk): Removed set of no_new_pseudos.
* config/i386/i386.md: Replaced no_new_pseudos with
(reload_completed || reload_in_progress).
* config/i386/i386.c (ix86_expand_move, ix86_expand_vector_move,
ix86_prepare_fp_compare_args, ix86_expand_carry_flag_compare): Ditto.
* config/sh/predicates.md: Ditto.
* config/sh/sh.c (prepare_move_operands, prepare_cbranch_operands,
emit_fpu_switch, fpscr_set_from_mem, sh_get_pr_initial_val): Ditto.
(sh_output_mi_thunk): Removed set of no_new_pseudos.
* config/sh/sh.md: Replaced no_new_pseudos with
(reload_completed || reload_in_progress).
* config/cris/cris.c (cris_expand_pic_call_address): Ditto.
* config/cris/cris.md: Ditto.
* config/mn10300/mn10300.md: Ditto.
* config/ia64/ia64.c (ia64_expand_move, ia64_expand_movxf_movrf): Ditto.
(ia64_output_mi_thunk): Removed set of no_new_pseudos.
* config/m68k/m68k.md: Replaced no_new_pseudos with
(reload_completed || reload_in_progress).
* config/m68k/m68k.c (m68k_output_mi_thunk): Removed set of
no_new_pseudos.
* config/rs6000/rs6000.c (rs6000_emit_set_const, rs6000_emit_move,
rs6000_got_register, create_TOC_reference,
rs6000_machopic_legitimize_pic_address): Ditto.
(rs6000_output_mi_thunk): Removed set of no_new_pseudos.
* config/rs6000/rs6000.md: Replaced no_new_pseudos with
(reload_completed || reload_in_progress).
* config/score/score.c (th_output_mi_thunk): Removed set of
no_new_pseudos.
(score_address_p): Replaced no_new_pseudos with
(reload_completed || reload_in_progress).
* config/arm/arm.c (require_pic_register, legitimize_pic_address,
arm_load_pic_register, arm_cannot_copy_insn_p): Ditto.
* config/arm/arm.md: Ditto.
* config/pa/pa.md: Ditto.
* config/pa/pa.c (emit_move_sequence): Ditto.
* config/mips/mips.c (mips_legitimate_address_p,
mips_split_symbol, mips_move_integer, mips_legitimize_const_move):
Ditto.
(mips_output_mi_thunk): Removed set of no_new_pseudos.
* config/h8300/h8300.md: Replaced no_new_pseudos with
(reload_completed || reload_in_progress).
* config/bfin/bfin.c (legitimize_pic_address): Ditto.
Index: toplev.c
===================================================================
--- toplev.c (revision 126242)
+++ toplev.c (working copy)
@@ -149,9 +149,6 @@ location_t input_location;
struct line_maps line_table;
-/* Nonzero if it is unsafe to create any new pseudo registers. */
-int no_new_pseudos;
-
/* Stack of currently pending input files. */
struct file_stack *input_file_stack;
Index: rtl.h
===================================================================
--- rtl.h (revision 126242)
+++ rtl.h (working copy)
@@ -1972,10 +1972,6 @@ extern int regstack_completed;
the same indirect address eventually. */
extern int cse_not_expected;
-/* Set to nonzero before life analysis to indicate that it is unsafe to
- generate any new pseudo registers. */
-extern int no_new_pseudos;
-
/* Translates rtx code to tree code, for those codes needed by
REAL_ARITHMETIC. The function returns an int because the caller may not
know what `enum tree_code' means. */
Index: tree-pass.h
===================================================================
--- tree-pass.h (revision 126242)
+++ tree-pass.h (working copy)
@@ -384,7 +384,6 @@ extern struct tree_opt_pass pass_regclas
extern struct tree_opt_pass pass_subregs_of_mode_init;
extern struct tree_opt_pass pass_subregs_of_mode_finish;
extern struct tree_opt_pass pass_inc_dec;
-extern struct tree_opt_pass pass_no_new_pseudos;
extern struct tree_opt_pass pass_stack_ptr_mod;
extern struct tree_opt_pass pass_initialize_regs;
extern struct tree_opt_pass pass_combine;
Index: passes.c
===================================================================
--- passes.c (revision 126242)
+++ passes.c (working copy)
@@ -727,7 +727,6 @@ init_optimization_passes (void)
NEXT_PASS (pass_regclass_init);
NEXT_PASS (pass_inc_dec);
NEXT_PASS (pass_initialize_regs);
- NEXT_PASS (pass_no_new_pseudos);
NEXT_PASS (pass_outof_cfg_layout_mode);
NEXT_PASS (pass_ud_rtl_dce);
NEXT_PASS (pass_combine);
Index: final.c
===================================================================
--- final.c (revision 126242)
+++ final.c (working copy)
@@ -4091,7 +4091,6 @@ rest_of_clean_state (void)
reload_completed = 0;
epilogue_completed = 0;
- no_new_pseudos = 0;
#ifdef STACK_REGS
regstack_completed = 0;
#endif
@@ -4147,27 +4146,3 @@ struct tree_opt_pass pass_clean_state =
0 /* letter */
};
-/* Set no_new_pseudos. */
-static unsigned int
-rest_of_no_new_pseudos (void)
-{
- no_new_pseudos = 1;
- return 0;
-}
-
-struct tree_opt_pass pass_no_new_pseudos =
-{
- NULL, /* name */
- NULL, /* gate */
- rest_of_no_new_pseudos, /* execute */
- NULL, /* sub */
- NULL, /* next */
- 0, /* static_pass_number */
- 0, /* tv_id */
- 0, /* properties_required */
- 0, /* properties_provided */
- 0, /* properties_destroyed */
- 0, /* todo_flags_start */
- 0, /* todo_flags_finish */
- 'p' /* letter */
-};
Index: struct-equiv.c
===================================================================
--- struct-equiv.c (revision 126242)
+++ struct-equiv.c (working copy)
@@ -431,7 +431,7 @@ rtx_equiv_p (rtx *xp, rtx y, int rvalue,
return false;
else if (x_common_live)
{
- if (! rvalue || info->input_cost < 0 || no_new_pseudos)
+ if (! rvalue || info->input_cost < 0 || reload_completed)
return false;
/* If info->live_update is not set, we are processing notes.
We then allow a match with x_input / y_input found in a
Index: emit-rtl.c
===================================================================
--- emit-rtl.c (revision 126242)
+++ emit-rtl.c (working copy)
@@ -780,9 +780,8 @@ gen_reg_rtx (enum machine_mode mode)
struct function *f = cfun;
rtx val;
- /* Don't let anything called after initial flow analysis create new
- registers. */
- gcc_assert (!no_new_pseudos);
+ /* Don't let anything called after reload create new registers. */
+ gcc_assert (!reload_completed);
if (generating_concat_p
&& (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
Index: cfgcleanup.c
===================================================================
--- cfgcleanup.c (revision 126242)
+++ cfgcleanup.c (working copy)
@@ -1587,7 +1587,7 @@ try_crossjump_to_edge (int mode, edge e1
partition boundaries). See the comments at the top of
bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
- if (flag_reorder_blocks_and_partition && no_new_pseudos)
+ if (flag_reorder_blocks_and_partition && reload_completed)
return false;
/* Search backward through forwarder blocks. We don't need to worry
Index: rtlhooks.c
===================================================================
--- rtlhooks.c (revision 126242)
+++ rtlhooks.c (working copy)
@@ -66,7 +66,7 @@ gen_lowpart_general (enum machine_mode m
&& SCALAR_INT_MODE_P (GET_MODE (x))
&& TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
GET_MODE_BITSIZE (GET_MODE (x)))
- && ! no_new_pseudos)
+ && !reload_completed)
return gen_lowpart_general (mode, force_reg (GET_MODE (x), x));
if (WORDS_BIG_ENDIAN)
Index: optabs.c
===================================================================
--- optabs.c (revision 126242)
+++ optabs.c (working copy)
@@ -3926,7 +3926,7 @@ prepare_operand (int icode, rtx x, int o
if (!insn_data[icode].operand[opnum].predicate
(x, insn_data[icode].operand[opnum].mode))
{
- if (no_new_pseudos)
+ if (reload_completed)
return NULL_RTX;
x = copy_to_mode_reg (insn_data[icode].operand[opnum].mode, x);
}
Index: mode-switching.c
===================================================================
--- mode-switching.c (revision 126242)
+++ mode-switching.c (working copy)
@@ -724,9 +724,7 @@ static unsigned int
rest_of_handle_mode_switching (void)
{
#ifdef OPTIMIZE_MODE_SWITCHING
- no_new_pseudos = 0;
optimize_mode_switching ();
- no_new_pseudos = 1;
#endif /* OPTIMIZE_MODE_SWITCHING */
return 0;
}
Index: modulo-sched.c
===================================================================
--- modulo-sched.c (revision 126242)
+++ modulo-sched.c (working copy)
@@ -2469,15 +2469,12 @@ rest_of_handle_sms (void)
#ifdef INSN_SCHEDULING
basic_block bb;
- /* We want to be able to create new pseudos. */
- no_new_pseudos = 0;
/* Collect loop information to be used in SMS. */
cfg_layout_initialize (0);
sms_schedule ();
/* Update the life information, because we add pseudos. */
max_regno = max_reg_num ();
- no_new_pseudos = 1;
/* Finalize layout changes. */
FOR_EACH_BB (bb)
Index: see.c
===================================================================
--- see.c (revision 126242)
+++ see.c (working copy)
@@ -3814,12 +3814,7 @@ gate_handle_see (void)
static unsigned int
rest_of_handle_see (void)
{
- int no_new_pseudos_bcp = no_new_pseudos;
-
- no_new_pseudos = 0;
see_main ();
- no_new_pseudos = no_new_pseudos_bcp;
-
run_fast_dce ();
return 0;
}
Index: ifcvt.c
===================================================================
--- ifcvt.c (revision 126242)
+++ ifcvt.c (working copy)
@@ -3968,10 +3968,6 @@ if_convert (bool recompute_dominance)
num_updated_if_blocks = 0;
num_true_changes = 0;
- /* Some transformations in this pass can create new pseudos,
- if the pass runs before reload. Make sure we can do so. */
- gcc_assert (! no_new_pseudos || reload_completed);
-
loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
mark_loop_exit_edges ();
loop_optimizer_finalize ();
@@ -4105,9 +4101,7 @@ gate_handle_if_after_combine (void)
static unsigned int
rest_of_handle_if_after_combine (void)
{
- no_new_pseudos = 0;
if_convert (true);
- no_new_pseudos = 1;
return 0;
}
Index: init-regs.c
===================================================================
--- init-regs.c (revision 126242)
+++ init-regs.c (working copy)
@@ -132,9 +132,7 @@ gate_initialize_regs (void)
static unsigned int
rest_of_handle_initialize_regs (void)
{
- no_new_pseudos = 0;
initialize_uninitialized_regs ();
- no_new_pseudos = 1;
return 0;
}
Index: lower-subreg.c
===================================================================
--- lower-subreg.c (revision 126242)
+++ lower-subreg.c (working copy)
@@ -1070,7 +1070,6 @@ decompose_multiword_subregs (void)
bitmap_and_compl_into (decomposable_context, non_decomposable_context);
if (!bitmap_empty_p (decomposable_context))
{
- int hold_no_new_pseudos = no_new_pseudos;
sbitmap sub_blocks;
unsigned int i;
sbitmap_iterator sbi;
@@ -1079,7 +1078,6 @@ decompose_multiword_subregs (void)
propagate_pseudo_copies ();
- no_new_pseudos = 0;
sub_blocks = sbitmap_alloc (last_basic_block);
sbitmap_zero (sub_blocks);
@@ -1185,8 +1183,6 @@ decompose_multiword_subregs (void)
}
}
- no_new_pseudos = hold_no_new_pseudos;
-
/* If we had insns to split that caused control flow insns in the middle
of a basic block, split those blocks now. Note that we only handle
the case where splitting a load has caused multiple possibly trapping
Index: bb-reorder.c
===================================================================
--- bb-reorder.c (revision 126242)
+++ bb-reorder.c (working copy)
@@ -2256,9 +2256,7 @@ gate_handle_partition_blocks (void)
static unsigned int
rest_of_handle_partition_blocks (void)
{
- no_new_pseudos = 0;
partition_hot_cold_basic_blocks ();
- no_new_pseudos = 1;
return 0;
}
Index: config/alpha/alpha.c
===================================================================
--- config/alpha/alpha.c (revision 126242)
+++ config/alpha/alpha.c (working copy)
@@ -933,7 +933,7 @@ alpha_legitimize_address (rtx x, rtx scr
part of the CONST_INT. Then load FOO plus any high-order part of the
CONST_INT into a register. Our address is (plus reg low-part-const).
This is done to reduce the number of GOT entries. */
- if (!no_new_pseudos
+ if (!(reload_completed || reload_in_progress)
&& GET_CODE (x) == CONST
&& GET_CODE (XEXP (x, 0)) == PLUS
&& GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
@@ -946,7 +946,7 @@ alpha_legitimize_address (rtx x, rtx scr
/* If we have a (plus reg const), emit the load as in (2), then add
the two registers, and finally generate (plus reg low-part-const) as
our address. */
- if (!no_new_pseudos
+ if (!(reload_completed || reload_in_progress)
&& GET_CODE (x) == PLUS
&& GET_CODE (XEXP (x, 0)) == REG
&& GET_CODE (XEXP (x, 1)) == CONST
@@ -1069,7 +1069,7 @@ alpha_legitimize_address (rtx x, rtx scr
return x;
else
{
- if (!no_new_pseudos)
+ if (!(reload_completed || reload_in_progress))
scratch = gen_reg_rtx (Pmode);
emit_insn (gen_rtx_SET (VOIDmode, scratch,
gen_rtx_HIGH (Pmode, x)));
@@ -1091,11 +1091,11 @@ alpha_legitimize_address (rtx x, rtx scr
if (addend)
x = expand_simple_binop (Pmode, PLUS, x, GEN_INT (addend),
- (no_new_pseudos ? scratch : NULL_RTX),
+ ((reload_completed || reload_in_progress) ? scratch : NULL_RTX),
1, OPTAB_LIB_WIDEN);
if (high)
x = expand_simple_binop (Pmode, PLUS, x, GEN_INT (high),
- (no_new_pseudos ? scratch : NULL_RTX),
+ ((reload_completed || reload_in_progress) ? scratch : NULL_RTX),
1, OPTAB_LIB_WIDEN);
return plus_constant (x, low);
@@ -1644,7 +1644,7 @@ alpha_emit_set_const_1 (rtx target, enum
int i, bits;
/* Use a pseudo if highly optimizing and still generating RTL. */
rtx subtarget
- = (flag_expensive_optimizations && !no_new_pseudos ? 0 : target);
+ = (flag_expensive_optimizations && !(reload_completed || reload_in_progress) ? 0 : target);
rtx temp, insn;
/* If this is a sign-extended 32-bit constant, we can do this in at most
@@ -1688,7 +1688,7 @@ alpha_emit_set_const_1 (rtx target, enum
{
if (no_output)
return pc_rtx;
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
{
emit_insn (gen_rtx_SET (VOIDmode, target, GEN_INT (high << 16)));
temp = target;
@@ -1727,7 +1727,7 @@ alpha_emit_set_const_1 (rtx target, enum
we can't make pseudos, we can't do anything since the expand_binop
and expand_unop calls will widen and try to make pseudos. */
- if (n == 1 || (mode == SImode && no_new_pseudos))
+ if (n == 1 || (mode == SImode && (reload_completed || reload_in_progress)))
return 0;
/* Next, see if we can load a related constant and then shift and possibly
@@ -1895,7 +1895,7 @@ alpha_emit_set_const (rtx target, enum m
/* If we can't make any pseudos, TARGET is an SImode hard register, we
can't load this constant in one insn, do this in DImode. */
- if (no_new_pseudos && mode == SImode
+ if ((reload_completed || reload_in_progress) && mode == SImode
&& GET_CODE (target) == REG && REGNO (target) < FIRST_PSEUDO_REGISTER)
{
result = alpha_emit_set_const_1 (target, mode, c, 1, no_output);
@@ -2700,7 +2700,7 @@ alpha_emit_conditional_move (rtx cmp, en
conditional move. Make sure we emit only comparisons we have;
swap or reverse as necessary. */
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
return NULL_RTX;
switch (code)
@@ -2777,7 +2777,7 @@ alpha_split_conditional_move (enum rtx_c
if (mode != DImode)
{
target = gen_lowpart (DImode, dest);
- if (! no_new_pseudos)
+ if (! (reload_completed || reload_in_progress))
subtarget = gen_reg_rtx (DImode);
else
subtarget = target;
Index: config/alpha/alpha.md
===================================================================
--- config/alpha/alpha.md (revision 126242)
+++ config/alpha/alpha.md (working copy)
@@ -506,7 +506,7 @@ (define_split
operands[4] = GEN_INT (low);
if (satisfies_constraint_L (rest_rtx))
operands[3] = rest_rtx;
- else if (! no_new_pseudos)
+ else if (! (reload_completed || reload_in_progress))
{
operands[3] = gen_reg_rtx (DImode);
emit_move_insn (operands[3], operands[2]);
@@ -4370,14 +4370,14 @@ (define_insn_and_split "*cmp_sadd_di"
(clobber (match_scratch:DI 5 "=r"))]
""
"#"
- "! no_new_pseudos || reload_completed"
+ "! (reload_completed || reload_in_progress)"
[(set (match_dup 5)
(match_op_dup:DI 1 [(match_dup 2) (const_int 0)]))
(set (match_dup 0)
(plus:DI (mult:DI (match_dup 5) (match_dup 3))
(match_dup 4)))]
{
- if (! no_new_pseudos)
+ if (! (reload_completed || reload_in_progress))
operands[5] = gen_reg_rtx (DImode);
else if (reg_overlap_mentioned_p (operands[5], operands[4]))
operands[5] = operands[0];
@@ -4395,14 +4395,14 @@ (define_insn_and_split "*cmp_sadd_si"
(clobber (match_scratch:SI 5 "=r"))]
""
"#"
- "! no_new_pseudos || reload_completed"
+ "! (reload_completed || reload_in_progress)"
[(set (match_dup 5)
(match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
(set (match_dup 0)
(plus:SI (mult:SI (match_dup 5) (match_dup 3))
(match_dup 4)))]
{
- if (! no_new_pseudos)
+ if (! (reload_completed || reload_in_progress))
operands[5] = gen_reg_rtx (DImode);
else if (reg_overlap_mentioned_p (operands[5], operands[4]))
operands[5] = operands[0];
@@ -4421,14 +4421,14 @@ (define_insn_and_split "*cmp_sadd_sidi"
(clobber (match_scratch:SI 5 "=r"))]
""
"#"
- "! no_new_pseudos || reload_completed"
+ "! (reload_completed || reload_in_progress)"
[(set (match_dup 5)
(match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
(set (match_dup 0)
(sign_extend:DI (plus:SI (mult:SI (match_dup 5) (match_dup 3))
(match_dup 4))))]
{
- if (! no_new_pseudos)
+ if (! (reload_completed || reload_in_progress))
operands[5] = gen_reg_rtx (DImode);
else if (reg_overlap_mentioned_p (operands[5], operands[4]))
operands[5] = operands[0];
@@ -4446,14 +4446,14 @@ (define_insn_and_split "*cmp_ssub_di"
(clobber (match_scratch:DI 5 "=r"))]
""
"#"
- "! no_new_pseudos || reload_completed"
+ "! (reload_completed || reload_in_progress)"
[(set (match_dup 5)
(match_op_dup:DI 1 [(match_dup 2) (const_int 0)]))
(set (match_dup 0)
(minus:DI (mult:DI (match_dup 5) (match_dup 3))
(match_dup 4)))]
{
- if (! no_new_pseudos)
+ if (! (reload_completed || reload_in_progress))
operands[5] = gen_reg_rtx (DImode);
else if (reg_overlap_mentioned_p (operands[5], operands[4]))
operands[5] = operands[0];
@@ -4471,14 +4471,14 @@ (define_insn_and_split "*cmp_ssub_si"
(clobber (match_scratch:SI 5 "=r"))]
""
"#"
- "! no_new_pseudos || reload_completed"
+ "! (reload_completed || reload_in_progress)"
[(set (match_dup 5)
(match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
(set (match_dup 0)
(minus:SI (mult:SI (match_dup 5) (match_dup 3))
(match_dup 4)))]
{
- if (! no_new_pseudos)
+ if (! (reload_completed || reload_in_progress))
operands[5] = gen_reg_rtx (DImode);
else if (reg_overlap_mentioned_p (operands[5], operands[4]))
operands[5] = operands[0];
@@ -4497,14 +4497,14 @@ (define_insn_and_split "*cmp_ssub_sidi"
(clobber (match_scratch:SI 5 "=r"))]
""
"#"
- "! no_new_pseudos || reload_completed"
+ "! (reload_completed || reload_in_progress)"
[(set (match_dup 5)
(match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
(set (match_dup 0)
(sign_extend:DI (minus:SI (mult:SI (match_dup 5) (match_dup 3))
(match_dup 4))))]
{
- if (! no_new_pseudos)
+ if (! (reload_completed || reload_in_progress))
operands[5] = gen_reg_rtx (DImode);
else if (reg_overlap_mentioned_p (operands[5], operands[4]))
operands[5] = operands[0];
@@ -5760,7 +5760,7 @@ (define_expand "movti"
{
rtx in[2], out[2], target;
- gcc_assert (!no_new_pseudos);
+ gcc_assert (!(reload_completed || reload_in_progress));
split_double (operands[1], &in[0], &in[1]);
Index: config/frv/frv.md
===================================================================
--- config/frv/frv.md (revision 126242)
+++ config/frv/frv.md (working copy)
@@ -7874,7 +7874,7 @@ (define_expand "symGOT2reg_hilo"
""
"
{
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
operands[6] = operands[5] = operands[0];
else
{
@@ -7902,7 +7902,7 @@ (define_expand "symGOTOFF2reg_hilo"
""
"
{
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
operands[6] = operands[5] = operands[0];
else
{
@@ -7950,7 +7950,7 @@ (define_expand "symGPREL2reg"
{
rtx insn;
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
operands[4] = operands[0];
else
operands[4] = gen_reg_rtx (SImode);
@@ -7976,7 +7976,7 @@ (define_expand "symGPREL2reg_hilo"
{
rtx insn;
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
{
emit_insn (gen_symGOT2reg (operands[0], operands[1], operands[2],
GEN_INT (R_FRV_GOT12)));
Index: config/s390/s390.c
===================================================================
--- config/s390/s390.c (revision 126242)
+++ config/s390/s390.c (working copy)
@@ -3371,7 +3371,7 @@ legitimize_tls_address (rtx addr, rtx re
void
emit_symbolic_move (rtx *operands)
{
- rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+ rtx temp = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (Pmode);
if (GET_CODE (operands[0]) == MEM)
operands[1] = force_reg (Pmode, operands[1]);
Index: config/s390/s390.md
===================================================================
--- config/s390/s390.md (revision 126242)
+++ config/s390/s390.md (working copy)
@@ -1394,7 +1394,7 @@ (define_expand "movhi"
{
/* Make it explicit that loading a register from memory
always sign-extends (at least) to SImode. */
- if (optimize && !no_new_pseudos
+ if (optimize && !(reload_completed || reload_in_progress)
&& register_operand (operands[0], VOIDmode)
&& GET_CODE (operands[1]) == MEM)
{
@@ -1441,7 +1441,7 @@ (define_expand "movqi"
{
/* On z/Architecture, zero-extending from memory to register
is just as fast as a QImode load. */
- if (TARGET_ZARCH && optimize && !no_new_pseudos
+ if (TARGET_ZARCH && optimize && !(reload_completed || reload_in_progress)
&& register_operand (operands[0], VOIDmode)
&& GET_CODE (operands[1]) == MEM)
{
@@ -1887,7 +1887,7 @@ (define_expand "load_multiple"
FAIL;
operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
- if (no_new_pseudos)
+ if ((reload_completed || reload_in_progress))
{
if (GET_CODE (XEXP (operands[1], 0)) == REG)
{
@@ -1977,7 +1977,7 @@ (define_expand "store_multiple"
operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
- if (no_new_pseudos)
+ if ((reload_completed || reload_in_progress))
{
if (GET_CODE (XEXP (operands[0], 0)) == REG)
{
Index: config/m32c/m32c.c
===================================================================
--- config/m32c/m32c.c (revision 126242)
+++ config/m32c/m32c.c (working copy)
@@ -3155,7 +3155,7 @@ m32c_prepare_move (rtx * operands, enum
emit_insn (gen_rtx_SET (Pmode, dest_reg, dest_mod));
operands[0] = gen_rtx_MEM (mode, dest_reg);
}
- if (!no_new_pseudos && MEM_P (operands[0]) && MEM_P (operands[1]))
+ if (!(reload_completed || reload_in_progress) && MEM_P (operands[0]) && MEM_P (operands[1]))
operands[1] = copy_to_mode_reg (mode, operands[1]);
return 0;
}
@@ -3220,7 +3220,7 @@ m32c_split_move (rtx * operands, enum ma
/* Before splitting mem-mem moves, force one operand into a
register. */
- if (!no_new_pseudos && MEM_P (operands[0]) && MEM_P (operands[1]))
+ if (!(reload_completed || reload_in_progress) && MEM_P (operands[0]) && MEM_P (operands[1]))
{
#if DEBUG0
fprintf (stderr, "force_reg...\n");
@@ -3235,7 +3235,7 @@ m32c_split_move (rtx * operands, enum ma
parts = 2;
#if DEBUG_SPLIT
- fprintf (stderr, "\nsplit_move %d all=%d\n", no_new_pseudos, split_all);
+ fprintf (stderr, "\nsplit_move %d all=%d\n", (reload_completed || reload_in_progress), split_all);
debug_rtx (operands[0]);
debug_rtx (operands[1]);
#endif
@@ -3774,7 +3774,7 @@ m32c_expand_insv (rtx *operands)
op0 = sub;
}
- if (no_new_pseudos
+ if ((reload_completed || reload_in_progress)
|| (GET_CODE (op0) == MEM && MEM_VOLATILE_P (op0)))
src0 = op0;
else
Index: config/spu/spu.c
===================================================================
--- config/spu/spu.c (revision 126242)
+++ config/spu/spu.c (working copy)
@@ -1420,7 +1420,7 @@ spu_split_immediate (rtx * ops)
rtx to, hi, lo;
int i;
constant_to_array (mode, ops[1], arrhi);
- to = no_new_pseudos ? ops[0] : gen_reg_rtx (mode);
+ to = (reload_completed || reload_in_progress) ? ops[0] : gen_reg_rtx (mode);
for (i = 0; i < 16; i += 4)
{
arrlo[i + 2] = arrhi[i + 2];
Index: config/sparc/sparc.md
===================================================================
--- config/sparc/sparc.md (revision 126242)
+++ config/sparc/sparc.md (working copy)
@@ -1845,7 +1845,7 @@ (define_expand "movsi_pic_label_ref"
{
current_function_uses_pic_offset_table = 1;
operands[2] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
{
operands[3] = operands[0];
operands[4] = operands[0];
@@ -1994,7 +1994,7 @@ (define_expand "movdi_pic_label_ref"
{
current_function_uses_pic_offset_table = 1;
operands[2] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
{
operands[3] = operands[0];
operands[4] = operands[0];
Index: config/sparc/sparc.c
===================================================================
--- config/sparc/sparc.c (revision 126242)
+++ config/sparc/sparc.c (working copy)
@@ -3088,7 +3088,7 @@ legitimize_tls_address (rtx addr)
{
rtx temp1, temp2, temp3, ret, o0, got, insn;
- gcc_assert (! no_new_pseudos);
+ gcc_assert (! (reload_completed || reload_in_progress));
if (GET_CODE (addr) == SYMBOL_REF)
switch (SYMBOL_REF_TLS_MODEL (addr))
@@ -8598,7 +8598,6 @@ sparc_output_mi_thunk (FILE *file, tree
reload_completed = 1;
epilogue_completed = 1;
- no_new_pseudos = 1;
emit_note (NOTE_INSN_PROLOGUE_END);
@@ -8784,7 +8783,6 @@ sparc_output_mi_thunk (FILE *file, tree
reload_completed = 0;
epilogue_completed = 0;
- no_new_pseudos = 0;
}
/* Return true if sparc_output_mi_thunk would be able to output the
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md (revision 126242)
+++ config/i386/i386.md (working copy)
@@ -15316,7 +15316,7 @@ (define_expand "tls_dynamic_gnu2_32"
(clobber (reg:CC FLAGS_REG))])]
"!TARGET_64BIT && TARGET_GNU2_TLS"
{
- operands[3] = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+ operands[3] = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (Pmode);
ix86_tls_descriptor_calls_expanded_in_cfun = true;
})
@@ -15365,7 +15365,7 @@ (define_insn_and_split "*tls_dynamic_gnu
""
[(set (match_dup 0) (match_dup 5))]
{
- operands[5] = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+ operands[5] = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (Pmode);
emit_insn (gen_tls_dynamic_gnu2_32 (operands[5], operands[1], operands[2]));
})
@@ -15380,7 +15380,7 @@ (define_expand "tls_dynamic_gnu2_64"
(clobber (reg:CC FLAGS_REG))])]
"TARGET_64BIT && TARGET_GNU2_TLS"
{
- operands[2] = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+ operands[2] = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (Pmode);
ix86_tls_descriptor_calls_expanded_in_cfun = true;
})
@@ -15424,7 +15424,7 @@ (define_insn_and_split "*tls_dynamic_gnu
""
[(set (match_dup 0) (match_dup 4))]
{
- operands[4] = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+ operands[4] = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (Pmode);
emit_insn (gen_tls_dynamic_gnu2_64 (operands[4], operands[1]));
})
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c (revision 126242)
+++ config/i386/i386.c (working copy)
@@ -9805,7 +9805,7 @@ ix86_expand_move (enum machine_mode mode
op1 = force_reg (Pmode, op1);
else if (!TARGET_64BIT || !x86_64_movabs_operand (op1, Pmode))
{
- rtx reg = no_new_pseudos ? op0 : NULL_RTX;
+ rtx reg = (reload_completed || reload_in_progress) ? op0 : NULL_RTX;
op1 = legitimize_pic_address (op1, reg);
if (op0 == op1)
return;
@@ -9880,7 +9880,7 @@ ix86_expand_vector_move (enum machine_mo
are moved via xmm registers, and moving them to stack can result in
unaligned memory access. Use ix86_expand_vector_move_misalign()
if memory operand is not aligned correctly. */
- if (!no_new_pseudos
+ if (!(reload_completed || reload_in_progress)
&& (mode == TImode) && !TARGET_64BIT
&& ((MEM_P (op0) && (MEM_ALIGN (op0) < align))
|| (MEM_P (op1) && (MEM_ALIGN (op1) < align))))
@@ -9904,7 +9904,7 @@ ix86_expand_vector_move (enum machine_mo
}
/* Make operand1 a register if it isn't already. */
- if (!no_new_pseudos
+ if (!(reload_completed || reload_in_progress)
&& !register_operand (op0, mode)
&& !register_operand (op1, mode))
{
@@ -11331,7 +11331,7 @@ ix86_prepare_fp_compare_args (enum rtx_c
/* Try to rearrange the comparison to make it cheaper. */
if (ix86_fp_comparison_cost (code)
> ix86_fp_comparison_cost (swap_condition (code))
- && (REG_P (op1) || !no_new_pseudos))
+ && (REG_P (op1) || !(reload_completed || reload_in_progress)))
{
rtx tmp;
tmp = op0, op0 = op1, op1 = tmp;
@@ -12061,7 +12061,7 @@ ix86_expand_carry_flag_compare (enum rtx
/* Swapping operands may cause constant to appear as first operand. */
if (!nonimmediate_operand (op0, VOIDmode))
{
- if (no_new_pseudos)
+ if ((reload_completed || reload_in_progress))
return false;
op0 = force_reg (mode, op0);
}
Index: config/sh/predicates.md
===================================================================
--- config/sh/predicates.md (revision 126242)
+++ config/sh/predicates.md (working copy)
@@ -782,7 +782,7 @@ (define_predicate "xor_operand"
if (GET_CODE (op) == CONST_INT)
return (TARGET_SHMEDIA
? (satisfies_constraint_I06 (op)
- || (no_new_pseudos && INTVAL (op) == 0xff))
+ || ((reload_completed || reload_in_progress) && INTVAL (op) == 0xff))
: satisfies_constraint_K08 (op));
if (TARGET_SHMEDIA
&& mode != DImode && GET_CODE (op) == SUBREG
Index: config/sh/sh.c
===================================================================
--- config/sh/sh.c (revision 126242)
+++ config/sh/sh.c (working copy)
@@ -1192,7 +1192,7 @@ prepare_move_operands (rtx operands[], e
/* It's ok. */;
else
{
- temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+ temp = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (Pmode);
operands[1] = legitimize_pic_address (operands[1], mode, temp);
}
}
@@ -1200,12 +1200,12 @@ prepare_move_operands (rtx operands[], e
&& GET_CODE (XEXP (operands[1], 0)) == PLUS
&& SYMBOLIC_CONST_P (XEXP (XEXP (operands[1], 0), 0)))
{
- temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+ temp = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (Pmode);
temp = legitimize_pic_address (XEXP (XEXP (operands[1], 0), 0),
mode, temp);
operands[1] = expand_binop (mode, add_optab, temp,
XEXP (XEXP (operands[1], 0), 1),
- no_new_pseudos ? temp
+ (reload_completed || reload_in_progress) ? temp
: gen_reg_rtx (Pmode),
0, OPTAB_LIB_WIDEN);
}
@@ -1298,7 +1298,7 @@ prepare_move_operands (rtx operands[], e
if (flag_schedule_insns)
emit_insn (gen_blockage ());
}
- tga_op1 = no_new_pseudos ? op0 : gen_reg_rtx (Pmode);
+ tga_op1 = (reload_completed || reload_in_progress) ? op0 : gen_reg_rtx (Pmode);
tmp = gen_sym2GOTTPOFF (op1);
emit_insn (gen_tls_initial_exec (tga_op1, tmp));
op1 = tga_op1;
@@ -1389,7 +1389,7 @@ prepare_cbranch_operands (rtx *operands,
}
}
op1 = operands[1];
- if (!no_new_pseudos)
+ if (!(reload_completed || reload_in_progress))
operands[1] = force_reg (mode, op1);
/* When we are handling DImode comparisons, we want to keep constants so
that we can optimize the component comparisons; however, memory loads
@@ -1412,7 +1412,7 @@ prepare_cbranch_operands (rtx *operands,
emit_move_insn (scratch, operands[2]);
operands[2] = scratch;
}
- else if (!no_new_pseudos)
+ else if (!(reload_completed || reload_in_progress))
operands[2] = force_reg (mode, operands[2]);
}
return comparison;
@@ -8323,7 +8323,7 @@ emit_fpu_switch (rtx scratch, int index)
}
src = DECL_RTL (fpscr_values);
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
{
emit_move_insn (scratch, XEXP (src, 0));
if (index != 0)
@@ -8492,7 +8492,7 @@ fpscr_set_from_mem (int mode, HARD_REG_S
enum attr_fp_mode norm_mode = ACTUAL_NORMAL_MODE (FP_MODE);
rtx addr_reg;
- addr_reg = no_new_pseudos ? get_free_reg (regs_live) : NULL_RTX;
+ addr_reg = (reload_completed || reload_in_progress) ? get_free_reg (regs_live) : NULL_RTX;
emit_fpu_switch (addr_reg, fp_mode == norm_mode);
}
@@ -10130,7 +10130,6 @@ sh_output_mi_thunk (FILE *file, tree thu
reload_completed = 1;
epilogue_completed = 1;
- no_new_pseudos = 1;
current_function_uses_only_leaf_regs = 1;
emit_note (NOTE_INSN_PROLOGUE_END);
@@ -10355,7 +10354,6 @@ sh_output_mi_thunk (FILE *file, tree thu
reload_completed = 0;
epilogue_completed = 0;
- no_new_pseudos = 0;
}
rtx
@@ -10430,13 +10428,14 @@ sh_get_pr_initial_val (void)
|| current_function_has_nonlocal_label))
return gen_frame_mem (SImode, return_address_pointer_rtx);
- /* If we haven't finished rtl generation, there might be a nonlocal label
- that we haven't seen yet.
- ??? get_hard_reg_initial_val fails if it is called while no_new_pseudos
- is set, unless it has been called before for the same register. And even
- then, we end in trouble if we didn't use the register in the same
- basic block before. So call get_hard_reg_initial_val now and wrap it
- in an unspec if we might need to replace it. */
+ /* If we haven't finished rtl generation, there might be a nonlocal
+ label that we haven't seen yet. ??? get_hard_reg_initial_val
+ fails if it is called while (reload_completed ||
+ reload_in_progress) is set, unless it has been called before for
+ the same register. And even then, we end in trouble if we didn't
+ use the register in the same basic block before. So call
+ get_hard_reg_initial_val now and wrap it in an unspec if we might
+ need to replace it. */
/* ??? We also must do this for TARGET_SH1 in general, because otherwise
combine can put the pseudo returned by get_hard_reg_initial_val into
instructions that need a general purpose registers, which will fail to
Index: config/sh/sh.md
===================================================================
--- config/sh/sh.md (revision 126242)
+++ config/sh/sh.md (working copy)
@@ -985,7 +985,7 @@ (define_expand "movdicc"
{
rtx tmp;
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
FAIL;
tmp = gen_reg_rtx (DImode);
@@ -1205,7 +1205,7 @@ (define_insn_and_split "*movsicc_umin"
(match_operand:SI 3 "register_operand" "0"))
(match_operand:SI 4 "arith_reg_or_0_operand" "r")))
(clobber (match_scratch:SI 5 "=&r"))]
- "TARGET_SHMEDIA && no_new_pseudos"
+ "TARGET_SHMEDIA && (reload_completed || reload_in_progress)"
"#"
"TARGET_SHMEDIA && reload_completed"
[(pc)]
@@ -1289,7 +1289,7 @@ (define_expand "movsicc"
{
rtx tmp;
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
FAIL;
tmp = gen_reg_rtx (SImode);
@@ -1398,7 +1398,7 @@ (define_expand "adddi3"
{
if (TARGET_SH1)
{
- if (no_new_pseudos && ! arith_reg_operand (operands[2], DImode))
+ if ((reload_completed || reload_in_progress) && ! arith_reg_operand (operands[2], DImode))
FAIL;
operands[2] = force_reg (DImode, operands[2]);
emit_insn (gen_adddi3_compact (operands[0], operands[1], operands[2]));
@@ -1693,7 +1693,7 @@ (define_expand "subsi3"
}
if (TARGET_SHMEDIA)
{
- if (no_new_pseudos && ! arith_reg_or_0_operand (operands[1], SImode))
+ if ((reload_completed || reload_in_progress) && ! arith_reg_or_0_operand (operands[1], SImode))
FAIL;
if (operands[1] != const0_rtx && GET_CODE (operands[1]) != SUBREG)
operands[1] = force_reg (SImode, operands[1]);
@@ -2357,7 +2357,7 @@ (define_insn_and_split "divsi_inv_m1"
(clobber (match_operand:DI 8 "register_operand" "=r"))]
"TARGET_SHMEDIA"
"#"
- "&& no_new_pseudos"
+ "&& (reload_completed || reload_in_progress)"
[(pc)]
"
{
@@ -2401,7 +2401,7 @@ (define_insn_and_split "divsi_inv_m2"
(clobber (match_operand:DI 4 "register_operand" "=r"))]
"TARGET_SHMEDIA"
"#"
- "&& no_new_pseudos"
+ "&& (reload_completed || reload_in_progress)"
[(pc)]
"
{
@@ -2445,7 +2445,7 @@ (define_insn_and_split "divsi_inv_m3"
(clobber (match_operand:DI 13 "register_operand" "=r"))]
"TARGET_SHMEDIA"
"#"
- "&& no_new_pseudos"
+ "&& (reload_completed || reload_in_progress)"
[(pc)]
"
{
@@ -2512,7 +2512,7 @@ (define_insn_and_split "divsi_inv_m1_3"
&& (TARGET_DIVIDE_INV_MINLAT
|| TARGET_DIVIDE_INV20U || TARGET_DIVIDE_INV20L)"
"#"
- "&& no_new_pseudos"
+ "&& (reload_completed || reload_in_progress)"
[(pc)]
"
{
@@ -2679,7 +2679,7 @@ (define_insn_and_split "*divsi_inv_fp_co
(clobber (match_operand:DF 9 "fp_arith_reg_operand" ""))
(clobber (match_operand:DF 10 "fp_arith_reg_operand" ""))
(clobber (match_operand:DF 11 "fp_arith_reg_operand" ""))]
- "TARGET_SHMEDIA_FPU && TARGET_DIVIDE_INV_FP && no_new_pseudos"
+ "TARGET_SHMEDIA_FPU && TARGET_DIVIDE_INV_FP && (reload_completed || reload_in_progress)"
"#"
"&& 1"
[(set (match_dup 9) (float:DF (match_dup 1)))
@@ -8689,8 +8689,8 @@ (define_expand "symGOT_load"
{
rtx insn, mem;
- operands[2] = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
- operands[3] = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+ operands[2] = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (Pmode);
+ operands[3] = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (Pmode);
if (TARGET_SHMEDIA)
{
@@ -8789,7 +8789,7 @@ (define_expand "symGOTOFF2reg"
"
{
rtx gotoffsym, insn;
- rtx t = no_new_pseudos ? operands[0] : gen_reg_rtx (GET_MODE (operands[0]));
+ rtx t = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (GET_MODE (operands[0]));
gotoffsym = gen_sym2GOTOFF (operands[1]);
PUT_MODE (gotoffsym, Pmode);
@@ -8909,7 +8909,7 @@ (define_expand "symDTPOFF2reg"
"
{
rtx dtpoffsym, insn;
- rtx t = no_new_pseudos ? operands[0] : gen_reg_rtx (GET_MODE (operands[0]));
+ rtx t = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (GET_MODE (operands[0]));
dtpoffsym = gen_sym2DTPOFF (operands[1]);
PUT_MODE (dtpoffsym, Pmode);
@@ -9495,7 +9495,7 @@ (define_expand "seq"
reg = operands[0];
if (GET_MODE (operands[0]) != SImode)
- reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
+ reg = (reload_completed || reload_in_progress) ? gen_rtx_SUBREG (SImode, operands[0], 0)
: gen_reg_rtx (SImode);
switch (GET_MODE (sh_compare_op0))
@@ -9559,7 +9559,7 @@ (define_expand "slt"
reg = operands[0];
if (GET_MODE (operands[0]) != SImode)
- reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
+ reg = (reload_completed || reload_in_progress) ? gen_rtx_SUBREG (SImode, operands[0], 0)
: gen_reg_rtx (SImode);
switch (GET_MODE (sh_compare_op0))
@@ -9622,14 +9622,14 @@ (define_expand "sle"
reg = operands[0];
if (GET_MODE (operands[0]) != SImode)
- reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
+ reg = (reload_completed || reload_in_progress) ? gen_rtx_SUBREG (SImode, operands[0], 0)
: gen_reg_rtx (SImode);
switch (GET_MODE (sh_compare_op0))
{
case SImode:
{
- tmp = no_new_pseudos ? reg : gen_reg_rtx (SImode);
+ tmp = (reload_completed || reload_in_progress) ? reg : gen_reg_rtx (SImode);
emit_insn (gen_cmpgtsi_media (tmp,
sh_compare_op0, sh_compare_op1));
@@ -9639,7 +9639,7 @@ (define_expand "sle"
case DImode:
{
- tmp = no_new_pseudos ? reg : gen_reg_rtx (SImode);
+ tmp = (reload_completed || reload_in_progress) ? reg : gen_reg_rtx (SImode);
emit_insn (gen_cmpgtdi_media (tmp,
sh_compare_op0, sh_compare_op1));
@@ -9689,7 +9689,7 @@ (define_expand "sgt"
reg = operands[0];
if (GET_MODE (operands[0]) != SImode)
- reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
+ reg = (reload_completed || reload_in_progress) ? gen_rtx_SUBREG (SImode, operands[0], 0)
: gen_reg_rtx (SImode);
sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0);
if (sh_compare_op1 != const0_rtx)
@@ -9753,7 +9753,7 @@ (define_expand "sge"
mode = GET_MODE (sh_compare_op1);
reg = operands[0];
if (GET_MODE (operands[0]) != SImode)
- reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
+ reg = (reload_completed || reload_in_progress) ? gen_rtx_SUBREG (SImode, operands[0], 0)
: gen_reg_rtx (SImode);
sh_compare_op0 = force_reg (mode, sh_compare_op0);
if (sh_compare_op1 != const0_rtx)
@@ -9763,7 +9763,7 @@ (define_expand "sge"
{
case SImode:
{
- rtx tmp = no_new_pseudos ? reg : gen_reg_rtx (SImode);
+ rtx tmp = (reload_completed || reload_in_progress) ? reg : gen_reg_rtx (SImode);
emit_insn (gen_cmpgtsi_media (tmp,
sh_compare_op1, sh_compare_op0));
@@ -9773,7 +9773,7 @@ (define_expand "sge"
case DImode:
{
- rtx tmp = no_new_pseudos ? reg : gen_reg_rtx (SImode);
+ rtx tmp = (reload_completed || reload_in_progress) ? reg : gen_reg_rtx (SImode);
emit_insn (gen_cmpgtdi_media (tmp,
sh_compare_op1, sh_compare_op0));
@@ -9837,7 +9837,7 @@ (define_expand "sgtu"
reg = operands[0];
if (GET_MODE (operands[0]) == DImode)
- reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
+ reg = (reload_completed || reload_in_progress) ? gen_rtx_SUBREG (SImode, operands[0], 0)
: gen_reg_rtx (SImode);
sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0);
if (sh_compare_op1 != const0_rtx)
@@ -9870,7 +9870,7 @@ (define_expand "sltu"
reg = operands[0];
if (GET_MODE (operands[0]) == DImode)
- reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
+ reg = (reload_completed || reload_in_progress) ? gen_rtx_SUBREG (SImode, operands[0], 0)
: gen_reg_rtx (SImode);
sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0);
if (sh_compare_op1 != const0_rtx)
@@ -9903,7 +9903,7 @@ (define_expand "sleu"
reg = operands[0];
if (GET_MODE (operands[0]) != SImode)
- reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
+ reg = (reload_completed || reload_in_progress) ? gen_rtx_SUBREG (SImode, operands[0], 0)
: gen_reg_rtx (SImode);
sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0);
if (sh_compare_op1 != const0_rtx)
@@ -9912,7 +9912,7 @@ (define_expand "sleu"
: GET_MODE (sh_compare_op1),
sh_compare_op1);
- tmp = no_new_pseudos ? reg : gen_reg_rtx (SImode);
+ tmp = (reload_completed || reload_in_progress) ? reg : gen_reg_rtx (SImode);
emit_insn (gen_cmpgtudi_media (tmp, sh_compare_op0, sh_compare_op1));
emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx));
@@ -9938,7 +9938,7 @@ (define_expand "sgeu"
reg = operands[0];
if (GET_MODE (operands[0]) != SImode)
- reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
+ reg = (reload_completed || reload_in_progress) ? gen_rtx_SUBREG (SImode, operands[0], 0)
: gen_reg_rtx (SImode);
sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0);
if (sh_compare_op1 != const0_rtx)
@@ -9947,7 +9947,7 @@ (define_expand "sgeu"
: GET_MODE (sh_compare_op1),
sh_compare_op1);
- tmp = no_new_pseudos ? operands[0] : gen_reg_rtx (SImode);
+ tmp = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (SImode);
emit_insn (gen_cmpgtudi_media (tmp, sh_compare_op1, sh_compare_op0));
emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx));
@@ -9987,7 +9987,7 @@ (define_expand "sne"
reg = operands[0];
if (GET_MODE (operands[0]) != SImode)
- reg = no_new_pseudos ? gen_rtx_SUBREG (SImode, operands[0], 0)
+ reg = (reload_completed || reload_in_progress) ? gen_rtx_SUBREG (SImode, operands[0], 0)
: gen_reg_rtx (SImode);
if (! TARGET_SHMEDIA_FPU
&& GET_MODE (sh_compare_op0) != DImode
@@ -10001,7 +10001,7 @@ (define_expand "sne"
: GET_MODE (sh_compare_op1),
sh_compare_op1);
- tmp = no_new_pseudos ? reg : gen_reg_rtx (SImode);
+ tmp = (reload_completed || reload_in_progress) ? reg : gen_reg_rtx (SImode);
emit_insn (gen_seq (tmp));
emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx));
Index: config/cris/cris.c
===================================================================
--- config/cris/cris.c (revision 126242)
+++ config/cris/cris.c (working copy)
@@ -3181,7 +3181,7 @@ cris_expand_pic_call_address (rtx *opp)
{
enum cris_pic_symbol_type t = cris_pic_symbol_type_of (op);
- CRIS_ASSERT (!no_new_pseudos);
+ CRIS_ASSERT (!(reload_completed || reload_in_progress));
/* For local symbols (non-PLT), just get the plain symbol
reference into a register. For symbols that can be PLT, make
@@ -3196,7 +3196,7 @@ cris_expand_pic_call_address (rtx *opp)
"move.d (const (unspec [sym] CRIS_UNSPEC_PLT)),rM"
"add.d rPIC,rM,rO", "jsr rO". */
rtx tem, rm, ro;
- gcc_assert (! no_new_pseudos);
+ gcc_assert (! (reload_completed || reload_in_progress));
current_function_uses_pic_offset_table = 1;
tem = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op), CRIS_UNSPEC_PLT);
rm = gen_reg_rtx (Pmode);
@@ -3222,7 +3222,7 @@ cris_expand_pic_call_address (rtx *opp)
access of the PLTGOT isn't constant). */
rtx tem, mem, rm, ro;
- gcc_assert (! no_new_pseudos);
+ gcc_assert (! (reload_completed || reload_in_progress));
current_function_uses_pic_offset_table = 1;
tem = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op),
CRIS_UNSPEC_PLTGOTREAD);
Index: config/cris/cris.md
===================================================================
--- config/cris/cris.md (revision 126242)
+++ config/cris/cris.md (working copy)
@@ -789,7 +789,7 @@ (define_expand "movsi"
if (MEM_P (operands[0])
&& ! REG_S_P (operands[1])
&& operands[1] != const0_rtx
- && ! no_new_pseudos)
+ && ! (reload_completed || reload_in_progress))
operands[1] = force_reg (SImode, operands[1]);
/* If we're generating PIC and have an incoming symbol, validize it to a
@@ -810,7 +810,7 @@ (define_expand "movsi"
{
/* We must have a register as destination for what we're about to
do, and for the patterns we generate. */
- CRIS_ASSERT (!no_new_pseudos);
+ CRIS_ASSERT (!(reload_completed || reload_in_progress));
operands[1] = force_reg (SImode, operands[1]);
}
else
@@ -829,7 +829,7 @@ (define_expand "movsi"
? operands[1] : get_related_value (operands[1]);
HOST_WIDE_INT offs = get_integer_term (operands[1]);
- gcc_assert (! no_new_pseudos);
+ gcc_assert (! (reload_completed || reload_in_progress));
tem = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, sym),
CRIS_UNSPEC_GOTREL);
if (offs != 0)
@@ -848,7 +848,7 @@ (define_expand "movsi"
"add.d rPIC,rM,rO", "move.d [rO],rN" with
the memory access marked as read-only. */
rtx tem, mem, rm, ro, rn = operands[0];
- gcc_assert (! no_new_pseudos);
+ gcc_assert (! (reload_completed || reload_in_progress));
tem = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, operands[1]),
CRIS_UNSPEC_GOTREAD);
rm = gen_reg_rtx (Pmode);
@@ -879,7 +879,7 @@ (define_expand "movsi"
rtx sym = get_related_value (operands[1]);
HOST_WIDE_INT offs = get_integer_term (operands[1]);
- gcc_assert (! no_new_pseudos
+ gcc_assert (! (reload_completed || reload_in_progress)
&& t == cris_got_symbol_needing_fixup
&& sym != NULL_RTX && offs != 0);
Index: config/mn10300/mn10300.md
===================================================================
--- config/mn10300/mn10300.md (revision 126242)
+++ config/mn10300/mn10300.md (working copy)
@@ -307,7 +307,7 @@ (define_expand "movsi"
operands[1] = force_reg (Pmode, operands[1]);
else
{
- temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+ temp = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (Pmode);
operands[1] = legitimize_pic_address (operands[1], temp);
}
}
@@ -315,12 +315,12 @@ (define_expand "movsi"
&& GET_CODE (XEXP (operands[1], 0)) == PLUS
&& SYMBOLIC_CONST_P (XEXP (XEXP (operands[1], 0), 0)))
{
- temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
+ temp = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (Pmode);
temp = legitimize_pic_address (XEXP (XEXP (operands[1], 0), 0),
temp);
operands[1] = expand_binop (SImode, add_optab, temp,
XEXP (XEXP (operands[1], 0), 1),
- no_new_pseudos ? temp
+ (reload_completed || reload_in_progress) ? temp
: gen_reg_rtx (Pmode),
0, OPTAB_LIB_WIDEN);
}
Index: config/ia64/ia64.c
===================================================================
--- config/ia64/ia64.c (revision 126242)
+++ config/ia64/ia64.c (working copy)
@@ -1028,7 +1028,7 @@ ia64_expand_move (rtx op0, rtx op1)
if (addend)
{
- rtx subtarget = no_new_pseudos ? op0 : gen_reg_rtx (mode);
+ rtx subtarget = (reload_completed || reload_in_progress) ? op0 : gen_reg_rtx (mode);
emit_insn (gen_rtx_SET (VOIDmode, subtarget, op1));
@@ -1342,7 +1342,7 @@ ia64_expand_movxf_movrf (enum machine_mo
/* We're hoping to transform everything that deals with XFmode
quantities and GR registers early in the compiler. */
- gcc_assert (!no_new_pseudos);
+ gcc_assert (!(reload_completed || reload_in_progress));
/* Struct to register can just use TImode instead. */
if ((GET_CODE (operands[1]) == SUBREG
@@ -1392,7 +1392,7 @@ ia64_expand_movxf_movrf (enum machine_mo
{
/* We're hoping to transform everything that deals with XFmode
quantities and GR registers early in the compiler. */
- gcc_assert (!no_new_pseudos);
+ gcc_assert (!(reload_completed || reload_in_progress));
/* Op0 can't be a GR_REG here, as that case is handled above.
If op0 is a register, then we spill op1, so that we now have a
@@ -9455,7 +9455,6 @@ ia64_output_mi_thunk (FILE *file, tree t
reload_completed = 1;
epilogue_completed = 1;
- no_new_pseudos = 1;
/* Set things up as ia64_expand_prologue might. */
last_scratch_gr_reg = 15;
@@ -9580,7 +9579,6 @@ ia64_output_mi_thunk (FILE *file, tree t
reload_completed = 0;
epilogue_completed = 0;
- no_new_pseudos = 0;
}
/* Worker function for TARGET_STRUCT_VALUE_RTX. */
Index: config/m68k/m68k.md
===================================================================
--- config/m68k/m68k.md (revision 126242)
+++ config/m68k/m68k.md (working copy)
@@ -665,7 +665,7 @@ (define_expand "movsi"
if (GET_CODE (base) == SYMBOL_REF
&& !offset_within_block_p (base, INTVAL (offset)))
{
- tmp = no_new_pseudos ? operands[0] : gen_reg_rtx (SImode);
+ tmp = (reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (SImode);
emit_move_insn (tmp, base);
emit_insn (gen_addsi3 (operands[0], tmp, offset));
DONE;
Index: config/m68k/m68k.c
===================================================================
--- config/m68k/m68k.c (revision 126242)
+++ config/m68k/m68k.c (working copy)
@@ -4129,7 +4129,6 @@ m68k_output_mi_thunk (FILE *file, tree t
rtx this_slot, offset, addr, mem, insn;
/* Pretend to be a post-reload pass while generating rtl. */
- no_new_pseudos = 1;
reload_completed = 1;
/* The "this" pointer is stored at 4(%sp). */
@@ -4203,7 +4202,6 @@ m68k_output_mi_thunk (FILE *file, tree t
/* Clean up the vars set above. */
reload_completed = 0;
- no_new_pseudos = 0;
/* Restore the original PIC register. */
if (flag_pic)
Index: config/rs6000/rs6000.c
===================================================================
--- config/rs6000/rs6000.c (revision 126242)
+++ config/rs6000/rs6000.c (working copy)
@@ -4060,7 +4060,7 @@ rs6000_emit_set_const (rtx dest, enum ma
return dest;
case SImode:
- result = no_new_pseudos ? dest : gen_reg_rtx (SImode);
+ result = (reload_completed || reload_in_progress) ? dest : gen_reg_rtx (SImode);
emit_insn (gen_rtx_SET (VOIDmode, copy_rtx (result),
GEN_INT (INTVAL (source)
@@ -4279,7 +4279,7 @@ rs6000_emit_move (rtx dest, rtx source,
return;
}
- if (!no_new_pseudos && GET_CODE (operands[0]) == MEM
+ if (!(reload_completed || reload_in_progress) && GET_CODE (operands[0]) == MEM
&& !gpc_reg_operand (operands[1], mode))
operands[1] = force_reg (mode, operands[1]);
@@ -4302,7 +4302,7 @@ rs6000_emit_move (rtx dest, rtx source,
if (FP_REGNO_P (regnum) || regnum >= FIRST_PSEUDO_REGISTER)
{
rtx newreg;
- newreg = (no_new_pseudos ? copy_rtx (operands[1])
+ newreg = ((reload_completed || reload_in_progress) ? copy_rtx (operands[1])
: gen_reg_rtx (mode));
emit_insn (gen_aux_truncdfsf2 (newreg, operands[1]));
operands[1] = newreg;
@@ -4429,7 +4429,7 @@ rs6000_emit_move (rtx dest, rtx source,
&& GET_CODE (operands[1]) != HIGH
&& GET_CODE (operands[1]) != CONST_INT)
{
- rtx target = (no_new_pseudos ? operands[0] : gen_reg_rtx (mode));
+ rtx target = ((reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (mode));
/* If this is a function address on -mcall-aixdesc,
convert it to the address of the descriptor. */
@@ -10489,7 +10489,8 @@ rs6000_got_register (rtx value ATTRIBUTE
/* The second flow pass currently (June 1999) can't update
regs_ever_live without disturbing other parts of the compiler, so
update it here to make the prolog/epilogue code happy. */
- if (no_new_pseudos && ! df_regs_ever_live_p (RS6000_PIC_OFFSET_TABLE_REGNUM))
+ if ((reload_completed || reload_in_progress)
+ && ! df_regs_ever_live_p (RS6000_PIC_OFFSET_TABLE_REGNUM))
df_set_regs_ever_live (RS6000_PIC_OFFSET_TABLE_REGNUM, true);
current_function_uses_pic_offset_table = 1;
@@ -14201,7 +14202,7 @@ uses_TOC (void)
rtx
create_TOC_reference (rtx symbol)
{
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
df_set_regs_ever_live (TOC_REGISTER, true);
return gen_rtx_PLUS (Pmode,
gen_rtx_REG (Pmode, TOC_REGISTER),
@@ -16148,7 +16149,6 @@ rs6000_output_mi_thunk (FILE *file, tree
reload_completed = 1;
epilogue_completed = 1;
- no_new_pseudos = 1;
/* Mark the end of the (empty) prologue. */
emit_note (NOTE_INSN_PROLOGUE_END);
@@ -16236,7 +16236,6 @@ rs6000_output_mi_thunk (FILE *file, tree
reload_completed = 0;
epilogue_completed = 0;
- no_new_pseudos = 0;
}
/* A quick summary of the various types of 'constant-pool tables'
@@ -19437,7 +19436,7 @@ rs6000_machopic_legitimize_pic_address (
/* Use a different reg for the intermediate value, as
it will be marked UNCHANGING. */
- reg_temp = no_new_pseudos ? reg : gen_reg_rtx (Pmode);
+ reg_temp = (reload_completed || reload_in_progress) ? reg : gen_reg_rtx (Pmode);
base = rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig, 0), 0),
Pmode, reg_temp);
offset =
Index: config/rs6000/rs6000.md
===================================================================
--- config/rs6000/rs6000.md (revision 126242)
+++ config/rs6000/rs6000.md (working copy)
@@ -1468,7 +1468,7 @@ (define_expand "add<mode>3"
else if (GET_CODE (operands[2]) == CONST_INT
&& ! add_operand (operands[2], <MODE>mode))
{
- rtx tmp = ((no_new_pseudos || rtx_equal_p (operands[0], operands[1]))
+ rtx tmp = (((reload_completed || reload_in_progress) || rtx_equal_p (operands[0], operands[1]))
? operands[0] : gen_reg_rtx (<MODE>mode));
HOST_WIDE_INT val = INTVAL (operands[2]);
@@ -1591,7 +1591,7 @@ (define_split
operands[4] = GEN_INT (low);
if (<MODE>mode == SImode || satisfies_constraint_L (GEN_INT (rest)))
operands[3] = GEN_INT (rest);
- else if (! no_new_pseudos)
+ else if (! (reload_completed || reload_in_progress))
{
operands[3] = gen_reg_rtx (DImode);
emit_move_insn (operands[3], operands[2]);
@@ -2988,7 +2988,7 @@ (define_expand "iorsi3"
&& ! logical_operand (operands[2], SImode))
{
HOST_WIDE_INT value = INTVAL (operands[2]);
- rtx tmp = ((no_new_pseudos || rtx_equal_p (operands[0], operands[1]))
+ rtx tmp = (((reload_completed || reload_in_progress) || rtx_equal_p (operands[0], operands[1]))
? operands[0] : gen_reg_rtx (SImode));
emit_insn (gen_iorsi3 (tmp, operands[1],
@@ -3009,7 +3009,7 @@ (define_expand "xorsi3"
&& ! logical_operand (operands[2], SImode))
{
HOST_WIDE_INT value = INTVAL (operands[2]);
- rtx tmp = ((no_new_pseudos || rtx_equal_p (operands[0], operands[1]))
+ rtx tmp = (((reload_completed || reload_in_progress) || rtx_equal_p (operands[0], operands[1]))
? operands[0] : gen_reg_rtx (SImode));
emit_insn (gen_xorsi3 (tmp, operands[1],
@@ -5797,7 +5797,7 @@ (define_insn_and_split "*floatsidf2_inte
(clobber (match_operand:SI 6 "gpc_reg_operand" "=&r"))]
"! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS"
"#"
- "&& (!no_new_pseudos || offsettable_nonstrict_memref_p (operands[4]))"
+ "&& (!(reload_completed || reload_in_progress) || offsettable_nonstrict_memref_p (operands[4]))"
[(pc)]
"
{
@@ -5867,7 +5867,7 @@ (define_insn_and_split "*floatunssidf2_i
(clobber (match_operand:DF 5 "gpc_reg_operand" "=&f"))]
"! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS"
"#"
- "&& (!no_new_pseudos || offsettable_nonstrict_memref_p (operands[4]))"
+ "&& (!(reload_completed || reload_in_progress) || offsettable_nonstrict_memref_p (operands[4]))"
[(pc)]
"
{
@@ -5933,7 +5933,7 @@ (define_insn_and_split "*fix_truncdfsi2_
(clobber (match_operand:DI 3 "memory_operand" "=o"))]
"(TARGET_POWER2 || TARGET_POWERPC) && TARGET_HARD_FLOAT && TARGET_FPRS"
"#"
- "&& (!no_new_pseudos || offsettable_nonstrict_memref_p (operands[3]))"
+ "&& (!(reload_completed || reload_in_progress) || offsettable_nonstrict_memref_p (operands[3]))"
[(pc)]
"
{
@@ -7649,7 +7649,7 @@ (define_expand "iordi3"
if (non_logical_cint_operand (operands[2], DImode))
{
HOST_WIDE_INT value;
- rtx tmp = ((no_new_pseudos || rtx_equal_p (operands[0], operands[1]))
+ rtx tmp = (((reload_completed || reload_in_progress) || rtx_equal_p (operands[0], operands[1]))
? operands[0] : gen_reg_rtx (DImode));
if (GET_CODE (operands[2]) == CONST_INT)
@@ -7682,7 +7682,7 @@ (define_expand "xordi3"
if (non_logical_cint_operand (operands[2], DImode))
{
HOST_WIDE_INT value;
- rtx tmp = ((no_new_pseudos || rtx_equal_p (operands[0], operands[1]))
+ rtx tmp = (((reload_completed || reload_in_progress) || rtx_equal_p (operands[0], operands[1]))
? operands[0] : gen_reg_rtx (DImode));
if (GET_CODE (operands[2]) == CONST_INT)
@@ -7960,7 +7960,7 @@ (define_expand "movsi_got"
value = INTVAL (offset);
if (value != 0)
{
- rtx tmp = (no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode));
+ rtx tmp = ((reload_completed || reload_in_progress) ? operands[0] : gen_reg_rtx (Pmode));
emit_insn (gen_movsi_got (tmp, operands[1]));
emit_insn (gen_addsi3 (operands[0], tmp, offset));
DONE;
@@ -8771,7 +8771,7 @@ (define_insn_and_split "*fix_trunctfsi2_
"!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"#"
- "&& (!no_new_pseudos || offsettable_nonstrict_memref_p (operands[5]))"
+ "&& (!(reload_completed || reload_in_progress) || offsettable_nonstrict_memref_p (operands[5]))"
[(pc)]
{
rtx lowword;
Index: config/score/score.c
===================================================================
--- config/score/score.c (revision 126242)
+++ config/score/score.c (working copy)
@@ -181,7 +181,6 @@ th_output_mi_thunk (FILE *file, tree thu
rtx this, temp1, temp2, insn, fnaddr;
/* Pretend to be a post-reload pass while generating rtl. */
- no_new_pseudos = 1;
reload_completed = 1;
/* We need two temporary registers in some cases. */
@@ -240,7 +239,6 @@ th_output_mi_thunk (FILE *file, tree thu
/* Clean up the vars set above. Note that final_end_function resets
the global pointer for us. */
reload_completed = 0;
- no_new_pseudos = 0;
}
/* Implement TARGET_STRICT_ARGUMENT_NAMING. */
@@ -812,7 +810,7 @@ score_address_p (enum machine_mode mode,
static rtx
score_force_temporary (rtx dest, rtx value)
{
- if (!no_new_pseudos)
+ if (!(reload_completed || reload_in_progress))
return force_reg (Pmode, value);
else
{
Index: config/arm/arm.c
===================================================================
--- config/arm/arm.c (revision 126242)
+++ config/arm/arm.c (working copy)
@@ -3295,7 +3295,7 @@ require_pic_register (void)
start the real expansion process. */
if (!current_function_uses_pic_offset_table)
{
- gcc_assert (!no_new_pseudos);
+ gcc_assert (!(reload_completed || reload_in_progress));
if (arm_pic_register != INVALID_REGNUM)
{
cfun->machine->pic_reg = gen_rtx_REG (Pmode, arm_pic_register);
@@ -3347,7 +3347,7 @@ legitimize_pic_address (rtx orig, enum m
if (reg == 0)
{
- gcc_assert (!no_new_pseudos);
+ gcc_assert (!(reload_completed || reload_in_progress));
reg = gen_reg_rtx (Pmode);
subregs = 1;
@@ -3411,7 +3411,7 @@ legitimize_pic_address (rtx orig, enum m
if (reg == 0)
{
- gcc_assert (!no_new_pseudos);
+ gcc_assert (!(reload_completed || reload_in_progress));
reg = gen_reg_rtx (Pmode);
}
@@ -3427,7 +3427,7 @@ legitimize_pic_address (rtx orig, enum m
test the index for the appropriate mode. */
if (!arm_legitimate_index_p (mode, offset, SET, 0))
{
- gcc_assert (!no_new_pseudos);
+ gcc_assert (!(reload_completed || reload_in_progress));
offset = force_reg (Pmode, offset);
}
@@ -3581,7 +3581,7 @@ arm_load_pic_register (unsigned long sav
}
else
{
- gcc_assert (!no_new_pseudos);
+ gcc_assert (!(reload_completed || reload_in_progress));
pic_tmp = gen_reg_rtx (Pmode);
}
@@ -6058,9 +6058,10 @@ arm_cannot_copy_insn_p (rtx insn)
{
rtx pat = PATTERN (insn);
- if (GET_CODE (pat) == SET)
+ if (GET_CODE (pat) == PARALLEL
+ && GET_CODE (XVECEXP (pat, 0, 0)) == SET)
{
- rtx rhs = SET_SRC (pat);
+ rtx rhs = SET_SRC (XVECEXP (pat, 0, 0));
if (GET_CODE (rhs) == UNSPEC
&& XINT (rhs, 1) == UNSPEC_PIC_BASE)
Index: config/arm/arm.md
===================================================================
--- config/arm/arm.md (revision 126242)
+++ config/arm/arm.md (working copy)
@@ -490,7 +490,7 @@ (define_expand "addsi3"
{
arm_split_constant (PLUS, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0], operands[1],
- optimize && !no_new_pseudos);
+ optimize && !(reload_completed || reload_in_progress));
DONE;
}
"
@@ -967,7 +967,7 @@ (define_expand "subsi3"
{
arm_split_constant (MINUS, SImode, NULL_RTX,
INTVAL (operands[1]), operands[0],
- operands[2], optimize && !no_new_pseudos);
+ operands[2], optimize && !(reload_completed || reload_in_progress));
DONE;
}
else /* TARGET_THUMB1 */
@@ -1737,7 +1737,7 @@ (define_expand "andsi3"
{
arm_split_constant (AND, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0],
- operands[1], optimize && !no_new_pseudos);
+ operands[1], optimize && !(reload_completed || reload_in_progress));
DONE;
}
@@ -2398,7 +2398,7 @@ (define_expand "iorsi3"
{
arm_split_constant (IOR, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0], operands[1],
- optimize && !no_new_pseudos);
+ optimize && !(reload_completed || reload_in_progress));
DONE;
}
else /* TARGET_THUMB1 */
@@ -4473,7 +4473,7 @@ (define_expand "movdi"
(match_operand:DI 1 "general_operand" ""))]
"TARGET_EITHER"
"
- if (!no_new_pseudos)
+ if (!(reload_completed || reload_in_progress))
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (DImode, operands[1]);
@@ -4661,13 +4661,13 @@ (define_expand "movsi"
{
arm_split_constant (SET, SImode, NULL_RTX,
INTVAL (operands[1]), operands[0], NULL_RTX,
- optimize && !no_new_pseudos);
+ optimize && !(reload_completed || reload_in_progress));
DONE;
}
}
else /* TARGET_THUMB1... */
{
- if (!no_new_pseudos)
+ if (!(reload_completed || reload_in_progress))
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (SImode, operands[1]);
@@ -4690,7 +4690,7 @@ (define_expand "movsi"
gcc_assert (GET_CODE (tmp) == SYMBOL_REF);
gcc_assert (SYMBOL_REF_TLS_MODEL (tmp) != 0);
- tmp = legitimize_tls_address (tmp, no_new_pseudos ? operands[0] : 0);
+ tmp = legitimize_tls_address (tmp, (reload_completed || reload_in_progress) ? operands[0] : 0);
if (addend)
{
tmp = gen_rtx_PLUS (SImode, tmp, addend);
@@ -4703,7 +4703,7 @@ (define_expand "movsi"
|| symbol_mentioned_p (operands[1])
|| label_mentioned_p (operands[1])))
operands[1] = legitimize_pic_address (operands[1], SImode,
- (no_new_pseudos ? operands[0] : 0));
+ ((reload_completed || reload_in_progress) ? operands[0] : 0));
"
)
@@ -5086,7 +5086,7 @@ (define_expand "movhi"
"
if (TARGET_ARM)
{
- if (!no_new_pseudos)
+ if (!(reload_completed || reload_in_progress))
{
if (GET_CODE (operands[0]) == MEM)
{
@@ -5130,7 +5130,7 @@ (define_expand "movhi"
emit_insn (gen_movsi (reg, GEN_INT (val)));
operands[1] = gen_lowpart (HImode, reg);
}
- else if (arm_arch4 && optimize && !no_new_pseudos
+ else if (arm_arch4 && optimize && !(reload_completed || reload_in_progress)
&& GET_CODE (operands[1]) == MEM)
{
rtx reg = gen_reg_rtx (SImode);
@@ -5193,7 +5193,7 @@ (define_expand "movhi"
else if (TARGET_THUMB2)
{
/* Thumb-2 can do everything except mem=mem and mem=const easily. */
- if (!no_new_pseudos)
+ if (!(reload_completed || reload_in_progress))
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (HImode, operands[1]);
@@ -5210,7 +5210,7 @@ (define_expand "movhi"
}
else /* TARGET_THUMB1 */
{
- if (!no_new_pseudos)
+ if (!(reload_completed || reload_in_progress))
{
if (GET_CODE (operands[1]) == CONST_INT)
{
@@ -5440,7 +5440,7 @@ (define_expand "movqi"
"
/* Everything except mem = const or mem = mem can be done easily */
- if (!no_new_pseudos)
+ if (!(reload_completed || reload_in_progress))
{
if (GET_CODE (operands[1]) == CONST_INT)
{
@@ -5548,7 +5548,7 @@ (define_expand "movsf"
}
else /* TARGET_THUMB1 */
{
- if (!no_new_pseudos)
+ if (!(reload_completed || reload_in_progress))
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (SFmode, operands[1]);
@@ -5624,7 +5624,7 @@ (define_expand "movdf"
}
else /* TARGET_THUMB */
{
- if (!no_new_pseudos)
+ if (!(reload_completed || reload_in_progress))
{
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (DFmode, operands[1]);
Index: config/pa/pa.md
===================================================================
--- config/pa/pa.md (revision 126242)
+++ config/pa/pa.md (working copy)
@@ -4434,7 +4434,8 @@ (define_expand "movdi"
/* Except for zero, we don't support loading a CONST_INT directly
to a hard floating-point register since a scratch register is
needed for the operation. While the operation could be handled
- before no_new_pseudos is true, the simplest solution is to fail. */
+ before (reload_completed || reload_in_progress) is true, the
+ simplest solution is to fail. */
if (TARGET_64BIT
&& GET_CODE (operands[1]) == CONST_INT
&& operands[1] != CONST0_RTX (DImode)
Index: config/pa/pa.c
===================================================================
--- config/pa/pa.c (revision 126242)
+++ config/pa/pa.c (working copy)
@@ -1378,7 +1378,7 @@ emit_move_sequence (rtx *operands, enum
if (GET_CODE (operand0) == MEM && IS_INDEX_ADDR_P (XEXP (operand0, 0)))
{
/* This is only safe up to the beginning of life analysis. */
- gcc_assert (!no_new_pseudos);
+ gcc_assert (!(reload_completed || reload_in_progress));
tem = copy_to_mode_reg (Pmode, XEXP (operand0, 0));
operand0 = replace_equiv_address (operand0, tem);
Index: config/mips/mips.c
===================================================================
--- config/mips/mips.c (revision 126242)
+++ config/mips/mips.c (working copy)
@@ -2059,7 +2059,7 @@ mips_legitimate_address_p (enum machine_
static rtx
mips_force_temporary (rtx dest, rtx value)
{
- if (!no_new_pseudos)
+ if (!(reload_completed || reload_in_progress))
return force_reg (Pmode, value);
else
{
@@ -2079,7 +2079,7 @@ mips_split_symbol (rtx temp, rtx addr)
if (!TARGET_MIPS16)
high = mips_force_temporary (temp, gen_rtx_HIGH (Pmode, copy_rtx (addr)));
- else if (no_new_pseudos)
+ else if ((reload_completed || reload_in_progress))
{
emit_insn (gen_load_const_gp (copy_rtx (temp)));
high = temp;
@@ -2430,7 +2430,7 @@ mips_move_integer (rtx dest, rtx temp, u
x = GEN_INT (codes[0].value);
for (i = 1; i < cost; i++)
{
- if (no_new_pseudos)
+ if ((reload_completed || reload_in_progress))
{
emit_insn (gen_rtx_SET (VOIDmode, temp, x));
x = temp;
@@ -2479,7 +2479,7 @@ mips_legitimize_const_move (enum machine
split_const (src, &base, &offset);
if (!TARGET_MIPS16
&& offset != const0_rtx
- && (!no_new_pseudos || SMALL_INT (offset)))
+ && (!(reload_completed || reload_in_progress) || SMALL_INT (offset)))
{
base = mips_force_temporary (dest, base);
emit_move_insn (dest, mips_add_offset (0, base, INTVAL (offset)));
@@ -7879,7 +7879,6 @@ mips_output_mi_thunk (FILE *file, tree t
rtx this, temp1, temp2, insn, fnaddr;
/* Pretend to be a post-reload pass while generating rtl. */
- no_new_pseudos = 1;
reload_completed = 1;
/* Mark the end of the (empty) prologue. */
@@ -7989,7 +7988,6 @@ mips_output_mi_thunk (FILE *file, tree t
/* Clean up the vars set above. Note that final_end_function resets
the global pointer for us. */
reload_completed = 0;
- no_new_pseudos = 0;
}
/* Returns nonzero if X contains a SYMBOL_REF. */
Index: config/h8300/h8300.md
===================================================================
--- config/h8300/h8300.md (revision 126242)
+++ config/h8300/h8300.md (working copy)
@@ -3251,7 +3251,7 @@ (define_expand "insv"
}
if (! bit_memory_operand (operands[0], GET_MODE (operands[0])))
{
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
FAIL;
operands[0] =
replace_equiv_address (operands[0],
@@ -3263,7 +3263,7 @@ (define_expand "insv"
FAIL;
if (! register_operand (operands[3], QImode))
{
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
FAIL;
operands[3] = force_reg (QImode, operands[3]);
}
@@ -3323,7 +3323,7 @@ (define_expand "extzv"
== MODE_INT))
operands[0] = SUBREG_REG (operands[0]);
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
temp = gen_lowpart (QImode, operands[0]);
else
temp = gen_reg_rtx (QImode);
@@ -3331,7 +3331,7 @@ (define_expand "extzv"
FAIL;
if (! bit_memory_operand (operands[1], QImode))
{
- if (no_new_pseudos)
+ if (reload_completed || reload_in_progress)
FAIL;
operands[1] =
replace_equiv_address (operands[1],
Index: config/bfin/bfin.c
===================================================================
--- config/bfin/bfin.c (revision 126242)
+++ config/bfin/bfin.c (working copy)
@@ -181,7 +181,7 @@ legitimize_pic_address (rtx orig, rtx re
if (reg == 0)
{
- gcc_assert (!no_new_pseudos);
+ gcc_assert (!(reload_completed || reload_in_progress));
reg = gen_reg_rtx (Pmode);
}
@@ -209,7 +209,7 @@ legitimize_pic_address (rtx orig, rtx re
if (reg == 0)
{
- gcc_assert (!no_new_pseudos);
+ gcc_assert (!(reload_completed || reload_in_progress));
reg = gen_reg_rtx (Pmode);
}