RE: How to supress a specific kind of ansi-aliasing rules?

["Bokhanko, Andrey S" <andrey dot s dot bokhanko at intel dot com>]

Diego Novillo wrote:

> No, it doesn't.  Both p1->m1 and p2->m2 will use the same memory tag
in
> GIMPLE and the same alias set during RTL.  Notice how a store between
> the two loads affects the second load:
> 
>   # VUSE <SMT.4_7(D)>
>   x_2 = p1_1(D)->m1;
> 
>   # SMT.4_8 = VDEF <SMT.4_7(D)>
>   p1_1(D)->m1 = 32;
> 
>   # VUSE <SMT.4_8>
>   y_4 = p2_3(D)->m2;
> 
> 
> Or did you mean that p1 and p2 should *not* interfere with each other?

Hmmm... Actually, I compiled the following program:

typedef struct {
    int s1_m1;
    int s1_m2;
} S1;

void foo(S1 *p1, S1 *p2) {
    p2->s1_m1 = p1->s1_m2 * 11;
    /* If ansi-aliasing happens, this MUL shold be removed. */
    p2->s1_m1 = p1->s1_m2 * 11;

    return;
}

with:

gcc4 -c -O2 -fno-strict-aliasing test.c

and the resulting assembly file had only one LOAD, one STORE and one
implementation of MUL. This optimization is only possible if compiler
able to prove independence between p2->s1_m1 and p1->s1_m2. I never
looked at gcc's internal dumps.

For the record: gcc 4.2.0 on IA64.

Yours,
Andrey