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Re: Abt RTL expression


A lot of thanks for the pointer...

>Probably. Look for at pattern with "movsi" in the name.

In th document 
http://gcc.gnu.org/onlinedocs/gccint/Insns.html#Insns

it is said that "An integer that says which pattern in the machine description matches
this insn, or −1 if the matching has not yet been attempted.Such matching is never attempted and this field remains −1 on an insn
whose pattern consists of a single use, clobber ...."

The integer in my pattern is -1. In fact integer for all the insn for a program (980602-2.c) like 

struct {
    unsigned bit : 30;
} t;

int main()
{
    if (!(t.bit++))
    exit (0);
    else
    abort ();
}

is -1 for my target. Can you explain this?

Thanks in advance.

Regards,
Shafi


----- Original Message ----
From: Rask Ingemann Lambertsen <rask@sygehus.dk>
To: Mohamed Shafi <shafitvm@yahoo.com>
Cc: gcc@gcc.gnu.org
Sent: Monday, October 16, 2006 7:28:42 PM
Subject: Re: Abt RTL expression

On Mon, Oct 16, 2006 at 05:20:44AM -0700, Mohamed Shafi wrote:
> hello all,
> 
> Sorry i am asking this kind of question.This might be weird to most of you but i am new to GCC.
> Can somebody tell me how to analyze the below instruction pattern
> 
> (insn 8 6 9 1 (parallel [
>             (set (reg/f:SI 32)
>                 (symbol_ref:SI ("t") <var_decl 0x402270b0 t>))
>             (clobber (reg:CC 21 cc))
>         ]) -1 (nil)
>     (nil))
> 
> Will i be able to find this pattern in .md files?

   Probably. Look for at pattern with "movsi" in the name.

> what does insn 8 6 9 1 mean?

   8 is the number of the insn, 6 is the number of the previous insn, 9 is
the number of the next insn and 1 is the number of the basic block to which
the insn belongs.

> reg/f ?

   This is actually documented (look for REG_POINTER):
<URL:http://gcc.gnu.org/onlinedocs/gccint/Flags.html#Flags>.

>  for varible declaration why is it needed to clobber CC?

   It depends on the target. Some targets modify the condition codes when
copying a value into a register while other targets don't. A third
possibility is that of the m68k, where storing a value in a data register
sets the condition codes while storing a value in an address register leaves
the condition codes unmodified. A fourth possibility is that of the PowerPC,
where this is optional on a per insn basis, but then you wouldn't normally
include the (clobber (reg:CC 21 cc)) version in the machine description.

-- 
Rask Ingemann Lambertsen.






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