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Re: paired register loads and stores

From: David Edelsohn <dje at watson dot ibm dot com>
To: "Erich Plondke" <eplondke at gmail dot com>
Cc: gcc <gcc at gcc dot gnu dot org>
Date: Fri, 29 Sep 2006 13:04:10 -0400
Subject: Re: paired register loads and stores
References: <deb8826f0609282227x6b7e96f7s141fc04abaf78372@mail.gmail.com> <200609291308.k8TD8pV33968@makai.watson.ibm.com> <eplondke@gmail.com> <deb8826f0609290641v18897830u620595965ac1febf@mail.gmail.com> <200609291352.k8TDqwV28032@makai.watson.ibm.com> <deb8826f0609290816p65bfd94ena4561ca08cf9dd6b@mail.gmail.com>

>>>>> Erich Plondke writes:

Erich> I guess in a way this is "autovectorization of random code snippets" so maybe
Erich> it's too complex but it seems within the realm of what combine could do...

	Yes, this is more appropriately addressed by straight-line code
vectorizations, i.e., SLP.  The peephole and GCC register allocator are
not trying to provide that functionality.

David

References:
- paired register loads and stores
  - From: Erich Plondke
- Re: paired register loads and stores
  - From: David Edelsohn
- Re: paired register loads and stores
  - From: Erich Plondke
- Re: paired register loads and stores
  - From: David Edelsohn
- Re: paired register loads and stores
  - From: Erich Plondke

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