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RFC: Memory SSA. A redesign of the virtual operand scheme.
- From: Diego Novillo <dnovillo at redhat dot com>
- To: gcc at gcc dot gnu dot org
- Date: Fri, 24 Feb 2006 14:54:31 -0500
- Subject: RFC: Memory SSA. A redesign of the virtual operand scheme.
Our current representation of memory operations in the IL is fairly
heavy and source of lots of painful memory and compile time problems. I
have been thinking on and off about the problem for a few months and
recently I found a few days to really sit down and look at the problem.
I think I may have a new scheme that has the potential of being a lot
lighter both in terms of memory utilization and compile time. I wrote
up my initial thoughts on this and will be using the IAB branch to test
The document is in its very early stages, it's mostly a brain dump over
the last few days, so it will likely be hard to read and it has glaring
holes and incomplete sections. It assumes some familiarity with GCC but
it tries to explain how the current system works, what's wrong with it
and how the new approach would look like.
In terms of implementation, I do not think they will be too painful, but
I will likely need to make changes in basic parts of our infrastructure.
For instance, V_MAY_DEF and VUSE operators will now need to support
multiple input operands. The operand scanner will no longer be
responsible for adding virtual operands, only the SSA renamer will.
Alias set pruning will also be done during SSA renaming.
So, if I get good results with the new scheme, I will target the changes
for the 4.3 release. The changes will be too risky for 4.2.
Comments and feedback on the document and the new scheme are greatly