Re: Questions about comparison insns in mips.md

[Ian Lance Taylor <ian at airs dot com>]

Eric Fisher <joefoxreal@gmail.com> writes:

>     Who can explains for me about the comparison insns in mips.md.

Look at the documentation for the bCOND instruction patterns.

>     One question, why there is only define_expand patterns but no
> define_insn.

Because the gcc model for comparison instructions is that they set
condition codes, but MIPS processors do not have condition codes.

> Supposed that I have a comparison instruction say 'cmp
> %1, %2', should I implement define_insn patterns for comparison insns?

It depends on where the result goes.

>     The second question. As for SETTING A REGISTER FROM A COMPARISON,
> must I implement them?

You do not have to implement them, although you should if your target
has that sort of instruction.  If you don't implement them, gcc will
use conditional branches to get the result of a comparison.

> Here is a pattern from mips.md,
> (define_expand "seq"
>   [(set (match_operand:SI 0 "register_operand" "=d")
> 	(lt:SI (match_dup 1)
> 	       (match_dup 2 )))]
>   ""
> {
>    /* Set up operands from compare.  */
>   operands[1] = branch_cmp[0];
>   operands[2] = branch_cmp[1];
> })
> Why here use match_dup not match_operand? And why to set up operands
> from compare?

Because that is how gcc invokes the patterns.  See the documentation
for the sCOND instructions.

Ian