addsi3 with set condition register

[ibanez at sunplus dot com]

I'm writing a gcc back-end for a new RISC.
This RISC has two kinds of add instructions,
one updates condition register and one doesn't.
ex.

1.)
   add     <-  add
   comp    <-  update condition register

2.)
   add_c   <-  add & update condition register

But case 2 pattern is not used at all.

The rtl generated by a sample program with -dr option is

  (insn 12 11 13 (set (reg:SI 168)
        (plus:SI (reg/v:SI 166 [ a ])
            (reg/v:SI 167 [ b ]))) -1 (nil)
    (nil))

  (insn 13 12 14 (set (reg:CC 33 cr1)
        (compare:CC (reg:SI 168)
            (const_int 0 [0x0]))) -1 (nil)
    (nil))
My pattern is

 (define_insn "..."
  [ (set (match_operand:SI 0 "register_operand" "=g")
       (plus:SI (match_operand:SI 1 "register_operand" "g")
              (match_operand:SI 2 "register_operand" "g")) )
    (set
        (reg:CC CC_REGNUM)
        (compare:CC (match_dup 0) (const_int 0)))]

Although I can use peephole/peephole2, but I think it's
not a good approach?
Thank you for your reading :)