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Re: Problem with Delayed Branch Scheduling
- From: Joern RENNECKE <joern dot rennecke at st dot com>
- To: Balaji S <sivanbalaji at acmet dot com>
- Cc: Steven Bosscher <stevenb at suse dot de>, gcc at gcc dot gnu dot org
- Date: Mon, 04 Jul 2005 16:59:23 +0100
- Subject: Re: Problem with Delayed Branch Scheduling
So you have a few instructions bundled into a VLIW instruction, and
one of the instructions in the bundle is moved into the delay slot,
thus breaking your VLIW bundle. Right?
That is a much harder problem... I don't think it is really possible
with the existing dbr scheduling pass, but maybe someone else knows a
trick for this...
So the problem is that we represent instructions that don't actually
exist as individual instructions? I think it is legitimate to use
machine_dependent_reorg to make the actual instructions explicit.
However, in order to do this without exploding the machine description,
you'd probvably have to revive match_insn (the one formerly named
match_insn2).