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Re: moving v16sf reg with multiple sub-regs
Dylan Cuthbert wrote:
The assembler instructions themselves don't allow the target to be the
same as the source unfortunately so removing the '&' is difficult. (If
I enforce the same thing without a '&' in inline asm using builtins and
building the expression manually to generate a new reg rtx if the
dest/source are the same do you think it will optimize better?)
If the register allocator doesn't know about the restrictions, then it
will probably continue to do things that require reloads, which means
you will still have the extra move instructions. So I don't think
generating RTL differently will help.
Just making the dest/src different regs at RTL generation time won't
work incidentally, as the optimizer will make them the same reg again.
So the early clobber constraints are the only way to make this work with
one register class.
You could try defining multiple register classes and using different
subsets for the source and dest registers, but that might just lead to
more of a mess.
Otherwise, try looking at the register allocators to see if they can do
a better job handling the early clobber constraints.
However, I don't see why it isn't eliminating the move that is generated
when it realises that the temporary source is discarded.
This doesn't make any sense to me in the context of the previous
example. We can't eliminate the move just because the source operand
dies in the instruction. This is irrelevant. The move was emitted
because of the early clobber constraint (presumably) which forces the
source and dest regs to be different non-overlapping registers.
It seems to
do this ok if it is just a define_insn with raw multi-line assembly, but
I don't understand this either. Examples please.
--
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com