This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
question about ashlqi3 pattern
- From: Balaji S <sivanbalaji at acmet dot com>
- To: gcc at gcc dot gnu dot org
- Date: Thu, 25 Nov 2004 16:53:40 +0530
- Subject: question about ashlqi3 pattern
- Organization: Acme Technologies Pvt. Ltd.
Hi,
I am porting GCC to a new target. I took stormy16 as a base and converting it to the new target.
Since my new target is having byte instructions, i introduced a byte left shift instruction in m/c desc. with the standard pattern name "ashlqi3" as follows.
(define_insn "ashlqi3"
[(set (match_operand:QI 0 "register_operand" "=r")
(ashift:QI (match_operand:QI 1 "register_operand" "0")
(match_operand:QI 2 "immediate_operand" "i")))]
""
"sll %0, %2"
[(set_attr "length" "2")
(set_attr "cc" "clobber")])
When I rebuilt GCC and tried with the following test case, *does not* giving me an *rtl with byte* (QI) shift operation.
Note: I do not have PROMOTE_MODE macro. It is undefined.
char a, b ;
void fn1 () { a = b << 1 ; }
rtl output by -dr:
(insn 8 6 9 0x0 (set (reg:QI 42)
(mem/f:QI (symbol_ref:HI ("b")) [0 b+0 S1 A8])) -1 (nil)
(nil))
(insn 9 8 10 0x0 (set (reg:HI 41)
(sign_extend:HI (reg:QI 42))) -1 (nil)
(nil))
(insn 10 9 11 0x0 (set (reg:HI 43)
(ashift:HI (reg:HI 41)
(const_int 1 [0x1]))) -1 (nil)
(nil))
(insn 11 10 13 0x0 (set (mem/f:QI (symbol_ref:HI ("a")) [0 a+0 S1 A8])
(subreg:QI (reg:HI 43) 0)) -1 (nil)
(nil))
I have tried on avr also but same result.
Pls. help me, Why am i not getting a byte QI left shift?