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Possible problem with scheduler
- From: "Ronny Pedersen" <rpedersen at atmel dot com>
- To: gcc at gcc dot gnu dot org
- Date: Mon, 22 Nov 2004 15:13:06 +0100
- Subject: Possible problem with scheduler
- Organization: Atmel
Hi!
Can anybody help me with this?
I am working on an internal port of gcc and have encountered an issue
in the sceduler which i beleive might be a bug. I can only provide you
with debug output from the scheduler pass since this is an internal
port of gcc, but hopefully we can get the port into the source tree
in the not so distant future.
The problem occurs in the second scheduling pass sched2. As one can
see from the enclosed snipped of the debug output from the sched2
pass, we have instructions 387 and 388 which are grouped together
with the SCHED_GROUP_P bit. Insn 387 is a "compare" which sets cc0
while insn 388 is a "sne" which uses cc0. These instructions should
be scheduled as a group but as one can see from the log, there are
some instructions which are scheduled in between these two instructions.
Some of these instructions clobber cc0 which means that insn 388
will use clobbered flags for the conditional excecution.
In order for this scheduling to work, I would think that all instructions
which are forward dependent on 388 also must be forward depended on 387
so that no instruction could be scheduled in between these two??? Or one
must include some mechanisms for checking dependencies on the cc0 register,
which I believe is not implemented.
Snippet from x.c.sched2:
;; ======================================================
;; -- basic block 15 from 367 to 616 -- after reload
;; ======================================================
;; --------------- forward dependences: ------------
;; --- Region Dependences --- b 15 bb 0
;; insn code bb dep prio cost reservation
;; ---- ---- -- --- ---- ---- -----------
;; 367 12 0 0 6 1 a1,a2: 615 376 371
;; 368 12 0 0 9 1 a1,a2: 615 371 710
;; 692 11 0 0 5 2 da,d: 615 381
;; 693 11 0 0 5 2 da,d: 615 388 381
;; 381 48 0 2 3 1 a1,a2: 615 382 388
;; 709 11 0 0 9 2 da,d: 615 711 387
;; 710 11 0 1 9 2 da,d: 615 711 387
;; 387 83 0 2 7 1 a1,a2: 615 711 388
;; + 388 97 0 3 2 1 a1,a2: 615 389
;; 711 18 0 3 7 2 da,d: 615 371
;; 371 50 0 3 5 1 a1,a2: 615 713 712 372
;; 382 48 0 1 2 1 a1,a2: 615 383
;; 389 13 0 1 1 0 da,d: 616 615
;; 372 50 0 1 4 1 a1,a2: 615 713 712
;; 383 13 0 1 1 0 da,d: 616 615
;; 376 20 0 1 0 1 a1,a2: 615
;; 712 10 0 2 4 2 da,d: 615 713
;; 713 18 0 3 2 2 da,d: 615
;; 615 84 0 18 0 1 a1,a2: 616
;; + 616 128 0 3 0 0 nothing:
;;Ready list after queue_to_ready: 709 693 692 368 367
;;Ready list after ready_sort: 692 693 367 709 368
;;Ready list (t = 0): 692 693 367 709 368
;; 0--> 368 r9=r6 :a1,a2
;;dependences resolved: insn 710 into ready
;;Ready list (t = 0): 692 693 367 710 709
;;Ready list after queue_to_ready: 692 693 367 710 709
;;Ready list after ready_sort: 692 693 367 710 709
;;Ready list (t = 1): 692 693 367 710 709
;; 1--> 709 r7=[sp+0x48] :da,d
;;Ready list (t = 1): 692 693 367 710
;;Ready list after queue_to_ready: 692 693 367 710
;;Ready list after ready_sort: 692 693 367 710
;;Ready list (t = 2): 692 693 367 710
;; 2--> 710 r6=[sp+0x34] :da,d
;;dependences resolved: insn 387 into queue with cost=2
;;Ready-->Q: insn 387: queued for 2 cycles.
;;Ready list (t = 2): 692 693 367
;;Ready list after queue_to_ready: 692 693 367
;;Ready list after ready_sort: 692 693 367
;;Ready list (t = 3): 692 693 367
;; 3--> 367 r8=r3 :a1,a2
;;dependences resolved: insn 376 into ready
;;Ready list (t = 3): 376 692 693
;;Q-->Ready: insn 387: moving to ready without stalls
;;Ready list after queue_to_ready: 387 376 692 693
;;Ready list after ready_sort: 376 692 693 387
;;Ready list (t = 4): 376 692 693 387
;; 4--> 387 cc0=cmp(r7,r6) :a1,a2
;;dependences resolved: insn 711 into ready
;;Ready list (t = 4): 376 692 693 711
;;Ready list after queue_to_ready: 376 692 693 711
;;Ready list after ready_sort: 376 692 693 711
;;Ready list (t = 5): 376 692 693 711
;; 5--> 711 r7=[sp+0x4] :da,d
;;dependences resolved: insn 371 into queue with cost=2
;;Ready-->Q: insn 371: queued for 2 cycles.
;;Ready list (t = 5): 376 692 693
;;Ready list after queue_to_ready: 376 692 693
;;Ready list after ready_sort: 376 692 693
;;Ready list (t = 6): 376 692 693
;; 6--> 693 r10=[sp+0x38] :da,d
;;Ready list (t = 6): 376 692
;;Q-->Ready: insn 371: moving to ready without stalls
;;Ready list after queue_to_ready: 371 376 692
;;Ready list after ready_sort: 376 692 371
;;Ready list (t = 7): 376 692 371
;; 7--> 371 r9=r9+r7 :a1,a2
;;dependences resolved: insn 372 into queue with cost=1
;;Ready-->Q: insn 372: queued for 1 cycles.
;;Ready list (t = 7): 376 692
;;Q-->Ready: insn 372: moving to ready without stalls
;;Ready list after queue_to_ready: 372 376 692
;;Ready list after ready_sort: 376 372 692
;;Ready list (t = 8): 376 372 692
;; 8--> 692 r11=[sp+0x4c] :da,d
;;dependences resolved: insn 381 into queue with cost=2
;;Ready-->Q: insn 381: queued for 2 cycles.
;;Ready list (t = 8): 376 372
;;Ready list after queue_to_ready: 376 372
;;Ready list after ready_sort: 376 372
;;Ready list (t = 9): 376 372
;; 9--> 372 r1=r1+r9 :a1,a2
;;dependences resolved: insn 712 into ready
;;Ready list (t = 9): 376 712
;;Q-->Ready: insn 381: moving to ready without stalls
;;Ready list after queue_to_ready: 381 376 712
;;Ready list after ready_sort: 376 381 712
;;Ready list (t = 10): 376 381 712
;; 10--> 712 r8=[`*.LC6'] :da,d
;;dependences resolved: insn 713 into queue with cost=2
;;Ready-->Q: insn 713: queued for 2 cycles.
;;Ready list (t = 10): 376 381
;;Ready list after queue_to_ready: 376 381
;;Ready list after ready_sort: 376 381
;;Ready list (t = 11): 376 381
;; 11--> 381 r11=r11+r10 :a1,a2
;;dependences resolved: insn 382 into queue with cost=1
;;Ready-->Q: insn 382: queued for 1 cycles.
;;dependences resolved: insn 388 into ready
;;Ready list (t = 11): 376 388
;;Q-->Ready: insn 382: moving to ready without stalls
;;Q-->Ready: insn 713: moving to ready without stalls
;;Ready list after queue_to_ready: 713 382 376 388
;;Ready list after ready_sort: 376 713 382 388
;;Ready list (t = 12): 376 713 382 388
;; 12--> 388 r10=cc0!=0x0 :a1,a2
;;dependences resolved: insn 389 into queue with cost=1
;;Ready-->Q: insn 389: queued for 1 cycles.
Regards
-Ronny