This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Write a md about a cpu having a risc unit and a dsp unit


On Tuesday 25 May 2004 07:01, mike@csdn.sign.idv.tw wrote:
> Hello,
>      I am going to write a machine description for a cpu having a risc
>      unit and a dsp unit.
>      The risc unit and dsp unit have their own register file.
>      When using dsp instrcutions, the risc unit has to load the data
>      from the main memory to dsp registers (using "load" instruction).
>      And when the dsp unit processed the instruction, the risc unit uses
>      "store" instruction to store the data back to the main memory.
>
>      Any idea how to describe this in the machine description?

Several existing targets have similar requirements for floating point 
coprocessors. You might want to take a look at eg. the machine descriptions 
for the arm fpa or maverick coprocessors.

Paul


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]