Support for 32-bit stack processors?

["The Thodes" <aspiesrule at mcleodusa dot net>]

I am wondering if GCC could be ported (as a cross-compiler, of course) to
0-operand, multiple-stack CPU's such as the Patriot Scientific IGNITE I/II.
The requirements are:

1.)  Modify the register allocator to handle partially accessible stack
caches and stacks kept partially in memory and partially in registers, as
well as to avoid thrashing the stacks.

2.)  Modify reg-stack.c to handle the new architechure(s).

3.)  Turn off "optimizations" such as CSE and some loop optimizations (such
as hoisting loads and sinking stores out of loops) that would slow things
down (due to excessive stack thrashing).

4.)  Fix the RTL generator to accommodate situations where operands are
implied instead of being specified for  insns.

Lucas

P.S. Please cc me, I'm not on the list