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Re: Reloading does not proper work on my new 8 bit target, please help


> Reloads for insn # 145
>
>  Reload 0: reload_in (HI) = (mem/f:HI (reg/f:HI 24 dp1L [144]) [0 lstr+0
S2
>  A16])
>
>        NO_SYSTEM_REGS, RELOAD_FOR_INPUT (opnum = 1)
>
>        reload_in_reg: (mem/f:HI (reg/f:HI 24 dp1L [144]) [0 lstr+0 S2
A16])
>
>        reload_reg_rtx: (reg/f:HI 24 dp1L [142])
>
> When you want to reload a memory operand into dp1L, you might need
> a secondary reload, as in this example.  Likewise  for dp2L for
> memory operands using dp2L.  Make sure this is reflected in
> SECONDARY_RELOAD_CLASS.  (or SECONDARY_INPUT_RELOAD_CLASS &
> SECONDARY_OUTPUT_RELOAD_CLASS if you need to make them different).
> If you defined MEMORY_MOVE_COST, also make sure that you take
> memory_move_secondary_cost into account.


The problem is that I don't want such kind reload,  that is why I don't
define SECONDARY_RELOAD_CLASS.



It seems that compiler should generate code like this



mem(dp1L) -> dp2L

mem(dp2L) ->(b0),



but  compiler generate



mem(dp1L) -> dp1L

dp1L  -> dp1L

mem(dp1L) ->b0,



because the class price for register are the same in GENERAL_REGS,
POINTER_DP1, POINTER_DP2 classes, and compiler takes the first suitable
register in class witch can be used as BASE_REG_CLASS without constraint
checking. This class is   POINTER_DP1 (see the parts of dump of  LREG
phase).

I don't understand why compiler does not check that register in POINTER_DP1
class is already used in the insn.

I suppose if I can decrease the class price for GENERAL_REGS and the price
of  GENERAL_REGS becomes less than  the class price for POINTER_DP1 or
POINTER_DP2, the compiler should generate correct code like this



mem(dp1L) -> b0  (or another register of GENERAL_REGS )

b0  -> dp2L

mem(dp2L) ->b0.



The question is How can I decrease the class price?


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