Optimising redundant compares

["Jon Beniston" <jbeniston at compxs dot com>]

Hi all,

I am working on a port of GCC to a machine that has a CC register that
is only modified by compare instructions. I have modeled this in GCC
using a single hard register rather than cc0. I would like to optimise
away redundant compare operations that are produced from the following
example:

 if (a == b) 
   ....
 else if (a < b)
   ...
 else if (a > b)
   ....

Currently, my GCC port produces code of the form:

  cmp  r3, r4
  beq  .label1
  cmp  r3, r4
  bl   .label2
  cmp  r3, r4
  bg   .label3
  ....

Currently I have a define_expand for cmphi that saves the operands, that
are then used in a gen_conditional_branch function, called by a
define_expand for each branch instruction. I assume that somehow in my
gen_conditional_branch function, I have to look at the previously
generated compare to see if it takes the same operands, and then omit
emitting a second compare instruction if they are identical. However,
how can I be sure that control flow / scheduling wont effect this. Any
hints or pointers to other ports that implement such an optisation would
be greatly appreciated.

Cheers,
JonB