Strange conditional jumps on the POWER4

[Roger Sayle <roger at www dot eyesopen dot com>]

Hi David,

I've come across some very stange behaviour when benchmarking
GCC on an AIX power4 box.  The test case I'm investigating is:

	if (j == 1) j = 0;
	else        j = 1;

It turns out that the code above is twice as slow as

	if (j > 1) j = 0;
	else       j = 1;

as timed using "gcc -O2" with mainline CVS.  This is particularly
curious because the second form uses a conditional jump, whereas
the first form generates straight line code.

I naturally suspected that the rs6000 backend was just poorly
tuned for power4, and that GCC was using straight line code when
it should have left the original branch untouched.

The real mystery is that when I then use "gcc -O2 -fno-if-conversion"
the resulting code with a conditional jump for the equality test is
twice as slow still?

Is it really the case that testing for equality/inequality on a
powerpc chip is 4 times slower that testing less-than/greater-than?


This counter-intuitive behaviour means that that gcc 3.4 runs
loop N3 of the whetstone benchmark at half the speed of gcc 3.2
on powerpc-ibm-aix5.2.0.0, even though the same transformation
doubles the performance from 3.2 to 3.4 on most other platforms.

Basically, jump bypassing turns:

	if (j == 1) j = 2;
	else        j = 3;
	if (j > 2)  j = 0;
	else        j = 1;
	if (j < 1)  j = 1;
	else        j = 0;

into the equivalent

	if (j == 1) j = 0;
	else        j = 1;


But for reasons I cannot explain, this degrades performance!?

Any clues as to whats going on?  I'm completely ignorant of this
architecture.  Is it some kind of pipeline stall?

Roger
--
Roger Sayle,                         E-mail: roger at eyesopen dot com
OpenEye Scientific Software,         WWW: http://www.eyesopen.com/
Suite 1107, 3600 Cerrillos Road,     Tel: (+1) 505-473-7385
Santa Fe, New Mexico, 87507.         Fax: (+1) 505-473-0833