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Re: gmake questions
hi,
On Sat, 8 Feb 2003 14:34:41 -0800 Jing Luo <Jing@vicom.com> wrote:
> Hi all,
>
> I have few questions about GNU make. I am using gmake 3.79.1 on Linux with
> kernel version 2.4.7-10.
> 1. Define macro failed
> My makefile looks like then following:
> <makefile>
> PROG=hello.o
> OBJS=main.o fc.o
> OBJDIR=../obj
> MACRO=-DSIDE(a)=CONCAT(HS_,a)
> (OBJDIR)/%.o : %.c
> $(CC) $(CCFLAGS) $(MACRO) $< -o $@
>
> OBJPROG = $(addprefix $(OBJDIR)/, $(PROG))
>
> all: $(OBJPROG)
> $(OBJPROG): $(addprefix $(OBJDIR)/, $(OBJS))
> $(LD) $(LDFLAGS) $^ -o $@
>
> Run [sample]: gmake all
> Result:
> gcc -DSIDE(a)=CONCAT(DS_,a) -Wall -O2 -g -o fc.o fc.c
> /bin/sh: -c: line 1: syntax error near unexpected token `-DSIDE(a'
> /bin/sh: -c: line 1: `gcc -DSIDE(a)=CONCAT(DS_,a) -Wall -O2 -g -o fc.o fc.c'
> gmake: *** [fc.o] Error 2
>
the problem is your shell, it attempts to interprete all brackets and equal
signs. try this:
MACRO=-D\"SIDE(a)=CONCAT(DS_,a)\"
in your macro definition.
> 2. If I want to make different rules for target .o, can I do it like this?
> (OBJDIR)/%.o : %.c
> $(CC) $(CCFLAGS) $(MACRO) $< -o $@
>
> (SEC_OBJ)/%.o: %.c
> $(CC) $(CCFLAGS) $(MACRO) $< -o $@
>
hm, this looks fine to me. just don't forget creating the target dircetories ;)
oh, i just noticed: there are missing $ characters before (OBJDIR) and
(SEC_OBJ), i believe.
anyway, there's a very good manual about gnu make at:
http://www.gnu.org/manual/make/index.html.
regards,
Tolga Dalman.