RFAdvice - a couple of old lost Altivec patches

[Zack Weinberg <zack at codesourcery dot com>]

I've been going through a customer's old 2.95+Altivec tree trying to
bring them up to 3.2.  I found a couple of patches that appear not to
have made it into 3.2, but may still be desirable there.

One is very simple: it adds to ppc-asm.h 

#define vX X

for X in 0 .. 31.  (Near the existing such defines for rX and fX.)
This can be put in easily but I don't know if it's wanted or not.

The other is a bit hairier.  The existing easy_vector_constant()
routine in rs6000.c only considers all-bits-zero easy.  The patch adds
a whole bunch more bit patterns that are considered easy - I quote the
code below for reference.  This is a clearly desirable feature; the
difficulty is, the routine is written to the old layout of
CONST_VECTOR.  I'm having trouble figuring out how to update it for
the new one.  Anyone have suggestions?

zw

int
easy_vector_constant (op)
     register rtx op;

{
  unsigned HOST_WIDE_INT immed;
  if (GET_CODE (op) != CONST_VECTOR
      || GET_MODE (op) != SVmode)
    return 0;

  immed = CONST_VECTOR_0 (op);

  /* If the four 32-bit words aren't the same, it can't be done unless it
     matches an lvsl or lvsr value.  */
  if (immed != CONST_VECTOR_1 (op)
      || immed != CONST_VECTOR_2 (op)
      || immed != CONST_VECTOR_3 (op))
    {
      if (immed + 0x04040404 == CONST_VECTOR_1 (op)
	  && CONST_VECTOR_1 (op) + 0x04040404 == CONST_VECTOR_2 (op)
	  && CONST_VECTOR_2 (op) + 0x04040404 == CONST_VECTOR_3 (op)
	  && (immed >> 16) + 0x0202 == (immed & 0xffff)
	  && (immed >> 24) + 1 == ((immed >> 16) & 0xff)
	  && (immed >>= 24) <= 0x10)
	{
	  if (immed == 0x10)
	    /* Use lvsr 0,0.  */
	    return 7;
	  else
	    /* Use lvsl 0,immed. */
	    return 8;
	}
      else
    return 0;
    }

  /* vxor v,v,v and vspltisw v,0 will work.  */
  else if (immed == 0)
    return 1;

  /* vcmpequw v,v,v and vspltisw v,-1 will work.  */
  else if (immed + 1 == 0)
    return 2;

  /* vsubcuw v,v,v and vspltisw v,1 will work.  */
  else if (immed == 1)
    return 3;

  /* vspltisw will work.  */
  else if (immed + 16 < 32)
    return 4;

  /* The two 16-bit halves aren't the same.  */
  else if (immed >> 16 != (immed & 0xffff))
    return 0;

  /* vspltish will work.  */
  else if (((immed + 16) & 0xffff) < 32)
    return 5;

  /* The two 8-bit halves aren't the same.  */
  else if (immed >> 24 != (immed & 0xff))
    return 0;

  /* vspltisb will work.  */
  else if (((immed + 16) & 0xff) < 32)
    return 6;

  return 0;
}