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Re: Vector modes under hppa64-hpu
- From: Steve Ellcey <sje at cup dot hp dot com>
- To: gcc at gcc dot gnu dot org
- Cc: aldyh at redhat dot com, dave at hiauly1 dot hia dot nrc dot ca
- Date: Wed, 24 Jul 2002 09:06:50 -0700 (PDT)
- Subject: Re: Vector modes under hppa64-hpu
- Reply-to: sje at cup dot hp dot com
I was looking at simd-1.c on IA64 HP-UX and PA64 HP-UX and I think I
have a fix for simd-1.c that works on IA64 all the time and on PA64 *if*
I do not optimize. To get rid of the problem in emit_move_insn I made
the change shown in the attached patch. The problem is that the size of
V2SI is the same as UNITS_PER_WORD on a 64 bit machine so
emit_move_insn_1 didn't handle it with its slow method but it also had
no code to handle it directly before it got to this test. On a 32 bit
machine this test would be true because V2SI is 8 bytes and
UNITS_PER_WORD is 4. I modified the test to allow it to be true for
vectors even if the size is not greater then UNITS_PER_WORD.
Does this seem like a reasonable fix? Or should there be code to handle
this somewhere else in emit_move_insn_1? I think the generated code
would be correct, just slow, but that shouldn't matter if the platform
we are on doesn't support VECTOR modes anyway.
The problem I have with this patch, and the reason I haven't submitted
it to gcc-patches is that even with this patch PA64 fails to compile
simd-1.c at -O1 or higher optimizations. I get the following message:
[hpsje - sje_simd] $ obj_pa64_gcc/gcc/cc1 -O1 simd-1.c
bar
simd-1.c: In function `bar':
simd-1.c:7: internal compiler error: Internal compiler error in simplify_gen_subreg, at simplify-rtx.c:2598
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://www.gnu.org/software/gcc/bugs.html> for instructions.
I haven't figured out what the problem is here. Any ideas on what to be
looking for? I wind up in simplify_gen_subreg with innermode == VOIDmode
and outermode == DImode. op is "(clobber (const_int 0 [0x0]))" and
byte is 0.
Steve Ellcey
sje@cup.hp.com
*** expr.c@@/main/hp/LATEST Wed Jul 10 13:06:24 2002
--- expr.c Tue Jul 23 11:29:21 2002
*************** emit_move_insn_1 (x, y)
*** 3043,3049 ****
/* This will handle any multi-word mode that lacks a move_insn pattern.
However, you will get better code if you define such patterns,
even if they must turn into multiple assembler instructions. */
! else if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)
{
rtx last_insn = 0;
rtx seq, inner;
--- 3043,3050 ----
/* This will handle any multi-word mode that lacks a move_insn pattern.
However, you will get better code if you define such patterns,
even if they must turn into multiple assembler instructions. */
! else if ((VECTOR_MODE_P (mode) && !VECTOR_MODE_SUPPORTED_P (mode))
! || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
{
rtx last_insn = 0;
rtx seq, inner;