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Re: The perennial i386 floating-point rounding issue...
- From: Kelley Cook <kelley dot r dot cook at gm dot com>
- To: Ross Smith <r-smith at ihug dot co dot nz>
- Cc: Jan Hubicka <jh at suse dot cz>, gcc at gcc dot gnu dot org
- Date: Wed, 12 Jun 2002 14:21:41 -0400
- Subject: Re: The perennial i386 floating-point rounding issue...
- References: <200206121822.53098.r-smith@ihug.co.nz>
>-march isn't a reliable guide to whether SSE is available, at least for
>AMD chips. According to AMD's docs, everything from the Athlon 4
>(a.k.a. Thunderbird) on has been made in both SSE and no-SSE versions,
>and the only reliable way to detect SSE is via the feature flags from
>the CPUID instruction.
Sorry, this just isn't true. No Thunderbirds (aka Athlon model 4) were ever
made with SSE support.
Perhaps you are confusing the "Mobile AMD Athlon™ 4" which is the name of their
mobile processor based on the Palomino core aka (Athlon model 6). All the
processors based on this core (or the newest model 8 core) are SSE capable.
The same distinction holds for the Duron line. All model 3s are not SSE
capable. All model 7s are. However like Celeron's, Duron's aren't listed as
seperate processors for GCC tuning.
Kelley Cook