Re: floating point war casualty list

[Paul Koning <pkoning at equallogic dot com>]

A couple of comments on a couple of points that have been mentioned.

"VAX F float is IEEE format" -- I don't actually know IEEE format, but
I have a VAX and a PDP11 architecture reference manual.  VAX F is VAX
D with the low order 32 mantissa bits lopped off.  In particular, the
order of the 16-bit halves, and the layout of exponent bits in the low
order 16 bits, is the same for F and D.  Currently I'm not seeing that
in gcc, at least not in the pdp11 case when I set that to VAX format
float.  (I haven't yet tried to build it for target=vax.)

"PDP11/40 FPU weirdness" -- the PDP11/40 FPU option is a different
instruction set from the "real" FPP, and functionally a tiny subset.
As for data format, it implements the same F format that other PDP11s
and VAX have.  (It omits D format.)

"G and H format" -- that was a later addition to the VAX
architecture.  G has more exponents bits and fewer mantissa bits than
D; H has an even bigger exponent than G and of course way more
mantissa bits.  PDP11s (with the 11/45 style "full" FPU) do F and D
only. 

"infinity and NaN" -- I don't see any signs of infinity in my VAX
architecture manual.  Zero with sign bit set is NaN, which will trap
if you enable that.  (If I read it right, real.c requires infinity
support to enable NaN support, so for its purposes, VAX format has
neither.) 

	  paul