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Re: -fprefetch-loop-arrays on PowerPC
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: Jan Hubicka <jh at suse dot cz>
- Cc: Andreas Conz <andreasc at neuro dot informatik dot uni-kassel dot de>, gcc at gcc dot gnu dot org
- Date: Mon, 27 May 2002 13:05:05 -0400
- Subject: Re: -fprefetch-loop-arrays on PowerPC
>>>>> Jan Hubicka writes:
>> dcbt 0,28 < ===========
>> dcbtst 0,28 < ===========
Jan> Hmm, I am getting somewhat confused by PPC assembly. The loop is
Jan> copying data fom first to result, so I guess it is OK to have two
Jan> prefetches, one for read and one for write.
Jan> But what does the ,28 mean? Is that register number? If so, where it
Jan> gets initialized?
The PowerPC cache touch instructions touch the sum of the two
register arguments. If the first register argument is zero, it is treated
as the value zero so the address only is the second register argument.
The fragment does not show where register 28 is set, so we don't know its