Re: powerpc & unaligned block moves with fp registers

[dewar at gnat dot com]

<<Slow in the case of misaligned accesses depends on the system; if the
hardware handles it by splitting up the accesses then it's likely to be
in the range of a few dotzend up to a few hundred cycles. If the acesses
emerge into the OS because the hardware cannot handle it then
the overhead is more likely to be in the range from a few hundred up to
several thousand cycles. It's really hard to give accurate numbers here
since it depends very much on the CPU and in the latter case also on the
>>

This is too pessimistic. For example, on Power, the penalty for a misligned
access is far less than this.

Yes, it very much depends on the architecture, but your generalization is
not accurate (and far too pessimistic) for many cases. I don't have the
figures for latest chips in the Pentium and Athlon series, but I would
be very surprised if the penalty is as much as a few dozen cycles (on
earlier chips it was about one clock).