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Re: reg+reg addressing mode on SPARC


Joe Buck <jbuck@synopsys.com> writes:

  > > GCC seems to be using the reg+reg addressing mode quite a lot, even 
  > > when it's not a clear win. 
  > 
  > There is already a GNATS bug for the pessimal code we get for simple
  > Fortran-style loops in C/C++ on the Sparc (c++/2430).  This bad code has been
  > there for a while, and has the interesting effect that the Stepanov
  > benchmark reports a score below 1 on the Sparc (since the simple loop
  > is misoptimized but the more complex loops are not).
  > 
  > I'm not sure that the problem is addressing mode selection, though.
  > Seems to me that the failure may be at a higher level, having to do with
  > hoisting invariants out of loops.

Here is the result that I get for the code from the 2340 bug report
using a version of gcc patched to have ADDRESS_COST 2 for the reg+reg
addressing modes and 1 for all the other cases:

./a.out
test      absolute   additions      ratio with
number    time       per second     test0

 0        0.31sec    161.29M         1.00
 1        0.31sec    161.29M         1.00
 2        0.31sec    161.29M         1.00
 3        0.31sec    161.29M         1.00
 4        0.31sec    161.29M         1.00
 5        0.31sec    161.29M         1.00
 6        0.31sec    161.29M         1.00
 7        0.31sec    161.29M         1.00
 8        0.31sec    161.29M         1.00
 9        0.31sec    161.29M         1.00
10        0.31sec    161.29M         1.00
11        0.31sec    161.29M         1.00
12        0.31sec    161.29M         1.00
mean:     0.31sec    161.29M         1.00

Total absolute time: 4.03 sec

Abstraction Penalty: 1.00

Also both programs from my original mail in this thread are compiled
to exactly the same assembly code.

        --dan


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