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Re: extv, extzv and insv patterns
On Tue, Jul 17, 2001 at 05:40:19PM +0200, Roman Lechtchinsky wrote:
> Note that I didn't ask about the mode of operands 2 and 3 but the mode the
> number of the starting bit is relative to.
As it happens, this came up on a port for me just yesterday...
I havn't looked at how the operands are actually processed in
expmed, and I suspect for all extant ports the mode of the
zero_extract and the mode of operand0 are the same, but:
I suggest that the bits be relative to the mode of operand0.
This lets us represent, for instance,
(set (zero_extract:SI (match_operand:DI 0 "register_operand" "+x")
(const_int 32)
(const_int 32))
(match_operand:SI 1 "register_operand" "r"))
Where "r" registers are 32-bits wide and "x" registers are
64-bits wide, and there is an instruction to set the top half
of an "x" from an "r".
r~