Re: ARM Thumb byte stores

[Jonathan Larmour <jlarmour at redhat dot com>]

Richard Earnshaw wrote:
> 
> > > This is a bug in gcc.  There is no strb instruction that stores to the
> > > stack in thumb mode.  It was fixed (I hope) in the cvs in early December:
> >
> > My problem was with cvs gcc yesterday :). I'm still trying to get a small
> > test case to reproduce the problem.
> >
> 
> Drat.  I thought that problem was behind us...  A test case is going to be
> need before I can progress this.  My guess is that it is likely to be some
> sort of reload problem, so it may be hard to whittle it down to a very
> short function.

[ much time passes ]

I have the test case now:


-------------------------------------------------------------------------
static char *dbg_addint(char *s, int n, int base)
{
    char buf[16];
    int  bpos = 0;
    char *digits = "0123456789ABCDEF";

    if( n == 0 ) buf[bpos++] = '0';
    else while( n != 0 )
    {
        unsigned int d = n % base;
        buf[bpos++] = digits[d];
        n /= base;
    }

    /* Now write it out in correct order. */
    while( bpos >= 0 )
        *s++ = buf[bpos--];
    
    return s;
}

-------------------------------------------------------------------------

This is verified against today's gcc-3_0-branch in CVS which gives us:

-------------------------------------------------------------------------
$ arm-elf-gcc -v -c -O2 -mthumb crash.c
Reading specs from /usr/local/gcc3_arm/lib/gcc-lib/arm-elf/3.0/specs
Configured with: /local/bartv/egcs/gcc/configure --target=arm-elf
--prefix=/usr/local/gcc3_arm
--with-as=/home/ecos/toolchains/latest/H-i686-pc-linux-gnu/bin/xscale-elf-as
--with-ld=/home/ecos/toolchains/latest/H-i686-pc-linux-gnu/bin/xscale-elf-ld
: (reconfigured) /local/bartv/egcs/gcc/configure --disable-libstdcxx_v3
--target=arm-elf --prefix=/usr/local/gcc3_arm
--with-as=/home/ecos/toolchains/latest/H-i686-pc-linux-gnu/bin/xscale-elf-as
--with-ld=/home/ecos/toolchains/latest/H-i686-pc-linux-gnu/bin/xscale-elf-ld
gcc version 3.0 20010403 (prerelease)
 /usr/local/gcc3_arm/lib/gcc-lib/arm-elf/3.0/cc1 -lang-c -v -D__GNUC__=3
-D__GNUC_MINOR__=0 -D__GNUC_PATCHLEVEL__=0 -Acpu=arm -Amachine=arm
-D__CHAR_UNSIGNED__ -D__OPTIMIZE__ -D__STDC_HOSTED__=1 -D__ARM_ARCH_4T__
-D__APCS_32__ -D__ARMEL__ -D__THUMBEL__ -D__ELF__ -D__thumb__ crash.c
-quiet
-dumpbase crash.c -mthumb -O2 -version -o /tmp/cc5tEG75.s
GNU CPP version 3.0 20010403 (prerelease) (cpplib) (ARM/ELF non-Linux)
GNU C version 3.0 20010403 (prerelease) (arm-elf)
        compiled by GNU C version 2.95.2 19991024 (release).
ignoring nonexistent directory "/usr/local/gcc3_arm/arm-elf/sys-include"
#include "..." search starts here:
#include <...> search starts here:
 /usr/local/gcc3_arm/lib/gcc-lib/arm-elf/3.0/include
 /usr/local/gcc3_arm/arm-elf/include
End of search list.
 /home/ecos/toolchains/latest/H-i686-pc-linux-gnu/bin/xscale-elf-as -o
crash.o /tmp/cc5tEG75.s
/tmp/cc5tEG75.s: Assembler messages:
/tmp/cc5tEG75.s:63: Error: byte or halfword not valid for base register
------------------------------------------------------------------------

------------------------------------------------------------------------
@ Generated by gcc 3.0 20010403 (prerelease) for ARM/elf
        .file   "crash.c"
        .code   16
.gcc2_compiled.:
        .section .rodata
        .align  2
.LC0:
        .ascii  "0123456789ABCDEF\000"
        .text
        .align  2
        .thumb_func
        .type   dbg_addint,function
dbg_addint:
        push    {r4, r5, r6, r7, lr}
        mov     r7, sl
        mov     r6, r8
        push    {r6, r7}
        mov     r7, r2
        ldr     r2, .L16
        mov     r4, r1
        sub     sp, sp, #16
        mov     r6, r0
        mov     r5, #0
        mov     sl, r2
        cmp     r4, #0
        beq     .L15
        mov     r8, sp
.L7:
        mov     r0, r4
        mov     r1, r7
        bl      __modsi3
        mov     r2, sl
        ldrb    r3, [r2, r0]
        mov     r2, r8
        strb    r3, [r2, r5]
        mov     r0, r4
        mov     r1, r7
        bl      __divsi3
        mov     r4, r0
        add     r5, r5, #1
        cmp     r4, #0
        bne     .L7
.L4:
        cmp     r5, #0
        blt     .L13
        mov     r2, r8
.L11:
        ldrb    r3, [r2, r5]
        strb    r3, [r6]
        sub     r5, r5, #1
        add     r6, r6, #1
        cmp     r5, #0
        bge     .L11
.L13:
        mov     r0, r6
        add     sp, sp, #16
        pop     {r3, r4}
        mov     r8, r3
        mov     sl, r4
        pop     {r4, r5, r6, r7, pc}
.L15:
        mov     r3, #48
        strb    r3, [sp]        @ <---- HERE
        mov     r8, sp
        mov     r5, #1
        b       .L4
.L17:
        .align  2
.L16:
        .word   .LC0
.Lfe1:
        .size   dbg_addint,.Lfe1-dbg_addint

------------------------------------------
The assembler output is above with the problem line highlighted.

Heop this helps!

Jifl
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