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Re: MODES_TIEABLE_P for big endian
- To: alehotsky at cygnus dot com (Alan Lehotsky)
- Subject: Re: MODES_TIEABLE_P for big endian
- From: Joern Rennecke <amylaar at redhat dot com>
- Date: Tue, 21 Nov 2000 18:05:47 +0000 (GMT)
- Cc: amylaar at redhat dot com (Joern Rennecke), gcc at gcc dot gnu dot org
> Did any conclusions ever result from this? The embedded chip
> I'm working on has exactly these characteristics (8 bit registers,
> big-endian, etc....)
>
> My MODES_TIEABLE_P actually doesn't allow HImode and larger things
> to be tied - but HImode and QImode can tie. I haven't seen anything
> go wrong yet. Do you have a test case for your port that fails?
You get an abort as part of the ordinary build process, but it's specific
to my port.
Well, in general you will just see that the 'optimization' doesn't
save any execution time nor code size because of the missing big-endian
correction. Only when the register set is layed out such that the
most significant part of a register in the wider mode is unsuitable for
the smaller mode you will see an abort.