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Re: Porting the GCC: order of registers
- To: "Anja \[M_ller\]" <Mueller-Lehnitz at t-online dot de>
- Subject: Re: Porting the GCC: order of registers
- From: Joern Rennecke <amylaar at cygnus dot co dot uk>
- Date: Mon, 31 Jan 2000 14:27:53 +0000 (GMT)
- CC: gcc at gcc dot gnu dot org
> But how does the GCC know that the higher part of the result is stored
> in register B ? When I defined the Macros FIXED_REGISTERS,
> CALL_USED_REGISTER, ... registers B is not the next one to register A,
> there are some other registers betweem them because the operation on
> these registers are faster, so they shall be allocated by the GCC
> earlier then regsiter B and the following. My Question is: which macro
> defines the order of register when more than one register is needed to
> store a value, for example a 16-Bit-Value in two 8-Bit-register ?
There is no such macro - you always get adjacent hard registers when
you use a hard register in a mode that is wider than a single hard
register.
However, there is REG_ALLOC_ORDER, so that you can order the registers
according to how multi-hard-register values are to be represented,
yet specify with REG_ALLOC_ORDER that a different order should be used
when allocating registers.