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Predicated execution
- To: gcc at gcc dot gnu dot org
- Subject: Predicated execution
- From: Michael Meissner <meissner at cygnus dot com>
- Date: Thu, 6 Jan 2000 22:48:51 -0500
Of the machines that GCC currently targets, are there any machines
that would use predicated (conditional) execution? Off the top of my
head there is the arm which does P.E. via FINAL_PRESCAN_INSN, and of
course the IA64. I am starting to look at infrastructure needed for
P.E. for the IA64 and others. If the port maintainers could email me
or reply to the group a brief summary of the predicated execution
support in their machine it would be appreciated.
In particular what is the form in RTL of your comparisons that enable
P.E., is it a cc0 machine (bletch), do you have multiple condition
code registers, and whether you have limitations on the instructions
executed, such as not being able to use instructions with constants
(like the 1 in a++), etc.
--
Michael Meissner, Cygnus Solutions
PMB 198, 174 Littleton Road #3, Westford, Massachusetts 01886
Work: meissner@cygnus.com phone: 978-486-9304 fax: 978-692-4482
Non-work: meissner@spectacle-pond.org