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Re: Peephole2 as a generic RTL rewriter

To: Richard Henderson <rth at cygnus dot com>
Subject: Re: Peephole2 as a generic RTL rewriter
From: Michael Hayes <m dot hayes at elec dot canterbury dot ac dot nz>
Date: Thu, 09 Sep 1999 20:07:27 +1200 (NZST)
Cc: Michael Hayes <m dot hayes at elec dot canterbury dot ac dot nz>, gcc at gcc dot gnu dot org
References: <14295.25274.627904.669657@andromeda.elec.canterbury.ac.nz><19990909005620.B23865@cygnus.com>

Richard Henderson writes:

 > What sorts of things did you have in mind?

Essentially bolting pairs of independent insns together into a single
parallel insn.  The C4x has many instructions that can perform an ALU
operation in parallel with a memory load/store.  While most of these
instructions can be combined after register allocation, the register
constraints are tighter for a paired multiply/add instruction and I
would like to emit these before register allocation.


Michael.

References:
- Peephole2 as a generic RTL rewriter
  - From: Michael Hayes
- Re: Peephole2 as a generic RTL rewriter
  - From: Richard Henderson

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