Re: MIPS and the frame pointer (non)chain

[Greg McGary <gkm at eng dot ascend dot com>]

Greg McGary <gkm@eng.ascend.com> writes:

> ...  Yes, there is a
> pedantic reason, but IMO it's not a *good* one: the MIPS ABI (SysV ABI
> MIPS supplement 3ed) states on page 3-15 that "Registers are saved in
> numerical order, with higher numbered registers saved in higher memory
> addresses".  Furthermore, figure 3-21 on page 3-16 shows that the
> floating-point register save area resides at lower address than the
> general register save area.  In order for the saved $fp and $ra to be
> at fixed offset from the current $fp, the saved GP regs must trade
> places with the saved FP regs.

I momentarily forgot about the ".mask" assembler directive which
encodes what registers are saved.  Anyone reading the mask from
symbol-table will assume that registers are stored in ascending order.
The ".mask" is ignored for STABS, but not for ECOFF and ELF.
Therefore, we can't a true frame pointer chain for binaries with
non-STABS debugging.