This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]

Re: PowerPC regclass problem



  In message <9901180637.AA58454@marc.watson.ibm.com>you write:
  > 	Looking at regclass.c:record_reg_classes(), the pattern which
  > would provide the base class constraint always fails for the instruction
  > in question.  There only is one alternative, the one alternative fails, so
  > GCC ignores all of the constraints.
I would think that in addition to the constraints that the definition of the
BASE_REG_CLASS would also tend to keep base register values out of r0.

regclass is supposed to look at memory refs and figure out which register is
the base & index, then adjust the costs accordingly.


  > 	The pattern in question is an indirect call.  The particular
  > constraint failing is 'p'.  One of the parameters to the pattern is an RTL
  > expression describing where to store the TOC register:
  > 
  > 	(plus:SI (reg:SI 1 r1)
  > 		 (const_int 20))
  > 
  > This parameter is hard-coded into the invocation of the indirect call
  > pattern and corresponds to the 'p' constraint argument. 
  > 
  > 	'p' is handled in record_reg_classes() basically by ignoring it --
  > never verifying it and never marking it as a win.  It is not a REG, not a
  > constant, and never assigned a register class, so it leads to alt_fail=1.
  > 
  > 	I do not understand how 'p' is suppose to work in general.  It is
  > not handled like memory constraints. And the argument above is not wrapped
  > in (mem:SI ...) either.  Any hints what is going on?
What happens if you change the operand to something like:
(use (match_operand "memory_operand" "o")

With the appropriate changes elsewhere in the rs6000 machine description?


jeff


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]