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[PATCH v2 06/18] Use CONST_DOUBLE_P macro. Autogenerated patch by running ../contrib/rtl-pred.sh CONST_DOUBLE
2019-08-05 Arvind Sankar <nivedita@alum.mit.edu>
gcc/ChangeLog:
* config/aarch64/aarch64.c: Convert
GET_CODE (..) == CONST_DOUBLE to CONST_DOUBLE_P (..).
* config/aarch64/aarch64.md: Likewise.
* config/arc/arc.c: Likewise.
* config/arc/arc.md: Likewise.
* config/arc/fpx.md: Likewise.
* config/bfin/bfin.md: Likewise.
* config/c6x/c6x.h: Likewise.
* config/c6x/c6x.md: Likewise.
* config/cr16/predicates.md: Likewise.
* config/cris/cris.c: Likewise.
* config/cris/cris.md: Likewise.
* config/csky/csky.c: Likewise.
* config/darwin.c: Likewise.
* config/fr30/fr30.c: Likewise.
* config/frv/frv.c: Likewise.
* config/frv/frv.h: Likewise.
* config/gcn/gcn-valu.md: Likewise.
* config/gcn/gcn.c: Likewise.
* config/ia64/ia64.c: Likewise.
* config/ia64/vect.md: Likewise.
* config/iq2000/iq2000.md: Likewise.
* config/lm32/lm32.c: Likewise.
* config/m32r/m32r.c: Likewise.
* config/m68k/m68k.c: Likewise.
* config/m68k/m68k.md: Likewise.
* config/m68k/predicates.md: Likewise.
* config/mcore/mcore.c: Likewise.
* config/microblaze/microblaze.c: Likewise.
* config/mips/mips.c: Likewise.
* config/mips/mips.md: Likewise.
* config/mmix/mmix.c: Likewise.
* config/mmix/predicates.md: Likewise.
* config/nds32/constraints.md: Likewise.
* config/nds32/nds32-predicates.c: Likewise.
* config/nds32/nds32.c: Likewise.
* config/nds32/nds32.h: Likewise.
* config/pa/pa.c: Likewise.
* config/pa/pa.md: Likewise.
* config/pdp11/pdp11.c: Likewise.
* config/s390/s390.c: Likewise.
* config/sh/sh.c: Likewise.
* config/sh/sh.h: Likewise.
* config/sparc/predicates.md: Likewise.
* config/sparc/sparc.c: Likewise.
* config/sparc/sparc.md: Likewise.
* config/spu/predicates.md: Likewise.
* config/spu/spu.c: Likewise.
* config/tilegx/tilegx.c: Likewise.
* config/tilepro/tilepro.c: Likewise.
* config/v850/predicates.md: Likewise.
* config/v850/v850.c: Likewise.
* config/vax/vax.c: Likewise.
* config/vax/vax.md: Likewise.
* config/visium/visium.c: Likewise.
* config/xtensa/xtensa.c: Likewise.
* defaults.h: Likewise.
* genpreds.c: Likewise.
* recog.c: Likewise.
* reg-stack.c: Likewise.
59 files changed, 161 insertions(+), 161 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index a526b8be522..68ad4858c76 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -7057,7 +7057,7 @@ aarch64_reinterpret_float_as_int (rtx value, unsigned HOST_WIDE_INT *intval)
}
scalar_float_mode mode;
- if (GET_CODE (value) != CONST_DOUBLE
+ if (!CONST_DOUBLE_P (value)
|| !is_a <scalar_float_mode> (GET_MODE (value), &mode)
|| GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT
/* Only support up to DF mode. */
@@ -7097,7 +7097,7 @@ aarch64_float_const_rtx_p (rtx x)
mov/movk pairs over ldr/adrp pairs. */
unsigned HOST_WIDE_INT ival;
- if (GET_CODE (x) == CONST_DOUBLE
+ if (CONST_DOUBLE_P (x)
&& SCALAR_FLOAT_MODE_P (mode)
&& aarch64_reinterpret_float_as_int (x, &ival))
{
@@ -7136,7 +7136,7 @@ aarch64_can_const_movi_rtx_p (rtx x, machine_mode mode)
scalar_int_mode imode;
unsigned HOST_WIDE_INT ival;
- if (GET_CODE (x) == CONST_DOUBLE
+ if (CONST_DOUBLE_P (x)
&& SCALAR_FLOAT_MODE_P (mode))
{
if (!aarch64_reinterpret_float_as_int (x, &ival))
@@ -14426,7 +14426,7 @@ aarch64_sve_float_arith_immediate_p (rtx x, bool negate_p)
REAL_VALUE_TYPE r;
if (!const_vec_duplicate_p (x, &elt)
- || GET_CODE (elt) != CONST_DOUBLE)
+ || !CONST_DOUBLE_P (elt))
return false;
r = *CONST_DOUBLE_REAL_VALUE (elt);
@@ -14452,7 +14452,7 @@ aarch64_sve_float_mul_immediate_p (rtx x)
/* GCC will never generate a multiply with an immediate of 2, so there is no
point testing for it (even though it is a valid constant). */
return (const_vec_duplicate_p (x, &elt)
- && GET_CODE (elt) == CONST_DOUBLE
+ && CONST_DOUBLE_P (elt)
&& real_equal (CONST_DOUBLE_REAL_VALUE (elt), &dconsthalf));
}
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 873f2760cce..1fe96d5f772 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1246,7 +1246,7 @@
}
if (GET_CODE (operands[0]) == MEM
- && ! (GET_CODE (operands[1]) == CONST_DOUBLE
+ && ! (CONST_DOUBLE_P (operands[1])
&& aarch64_float_const_zero_rtx_p (operands[1])))
operands[1] = force_reg (<MODE>mode, operands[1]);
}
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 486053c98ca..abdb51fbb31 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -2390,7 +2390,7 @@ arc_double_limm_p (rtx value)
{
HOST_WIDE_INT low, high;
- gcc_assert (GET_CODE (value) == CONST_DOUBLE);
+ gcc_assert (CONST_DOUBLE_P (value));
if (TARGET_DPFP)
return true;
@@ -4692,7 +4692,7 @@ arc_print_operand (FILE *file, rtx x, int code)
fputs (reg_names[REGNO (x)+1], file);
}
else if (CONST_INT_P (x)
- || GET_CODE (x) == CONST_DOUBLE)
+ || CONST_DOUBLE_P (x))
{
rtx first, second, word;
@@ -4712,7 +4712,7 @@ arc_print_operand (FILE *file, rtx x, int code)
{
char str[30];
- gcc_assert (GET_CODE (x) == CONST_DOUBLE
+ gcc_assert (CONST_DOUBLE_P (x)
&& GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT);
real_to_decimal (str, CONST_DOUBLE_REAL_VALUE (x), sizeof (str), 0, 1);
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index 7cd47338ec2..63b65d533a4 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -5637,7 +5637,7 @@ core_3, archs4x, archs4xd, archs4xd_slow"
"
if (TARGET_DPFP)
{
- if (GET_CODE (operands[2]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[2]))
{
rtx first, second, tmp;
split_double (operands[2], &first, &second);
@@ -5671,13 +5671,13 @@ core_3, archs4x, archs4xd, archs4xd_slow"
"
if (TARGET_DPFP)
{
- if (TARGET_FP_DP_AX && (GET_CODE (operands[1]) == CONST_DOUBLE))
+ if (TARGET_FP_DP_AX && (CONST_DOUBLE_P (operands[1])))
operands[1] = force_reg (DFmode, operands[1]);
- if ((GET_CODE (operands[1]) == CONST_DOUBLE)
- || GET_CODE (operands[2]) == CONST_DOUBLE)
+ if ((CONST_DOUBLE_P (operands[1]))
+ || CONST_DOUBLE_P (operands[2]))
{
rtx first, second, tmp;
- int const_index = ((GET_CODE (operands[1]) == CONST_DOUBLE) ? 1 : 2);
+ int const_index = ((CONST_DOUBLE_P (operands[1])) ? 1 : 2);
split_double (operands[const_index], &first, &second);
tmp = force_reg (SImode, TARGET_BIG_ENDIAN ? first : second);
emit_insn (gen_subdf3_insn (operands[0], operands[1],
@@ -5709,7 +5709,7 @@ core_3, archs4x, archs4xd, archs4xd_slow"
"
if (TARGET_DPFP)
{
- if (GET_CODE (operands[2]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[2]))
{
rtx first, second, tmp;
split_double (operands[2], &first, &second);
diff --git a/gcc/config/arc/fpx.md b/gcc/config/arc/fpx.md
index 0d0230baff0..e13e10bf7df 100644
--- a/gcc/config/arc/fpx.md
+++ b/gcc/config/arc/fpx.md
@@ -239,7 +239,7 @@
(use (match_dup 2))
]
"TARGET_DPFP &&
- !(GET_CODE(operands[2]) == CONST_DOUBLE && CONST_INT_P (operands[3]))"
+ !(CONST_DOUBLE_P (operands[2]) && CONST_INT_P (operands[3]))"
"@
daddh%F0%F1 0,%H2,%L2
daddh%F0%F1 0,%3,%L2"
@@ -263,7 +263,7 @@
(use (match_dup 2))
]
"TARGET_DPFP &&
- !(GET_CODE(operands[2]) == CONST_DOUBLE && CONST_INT_P (operands[3]))"
+ !(CONST_DOUBLE_P (operands[2]) && CONST_INT_P (operands[3]))"
"@
dmulh%F0%F1 0,%H2,%L2
dmulh%F0%F1 0,%3, %L2"
@@ -294,8 +294,8 @@
; different USE pairs.
(use (match_dup 2))]
"TARGET_DPFP &&
- !(GET_CODE(operands[2]) == CONST_DOUBLE && CONST_INT_P (operands[3])) &&
- !(GET_CODE(operands[1]) == CONST_DOUBLE && CONST_INT_P (operands[3]))"
+ !(CONST_DOUBLE_P (operands[2]) && CONST_INT_P (operands[3])) &&
+ !(CONST_DOUBLE_P (operands[1]) && CONST_INT_P (operands[3]))"
"@
dsubh%F0%F1 0,%H2,%L2
dsubh%F0%F1 0,%3,%L2
@@ -553,7 +553,7 @@
(plus:DF (match_dup 1)
(match_dup 2)))])]
"TARGET_DPFP &&
- !(GET_CODE(operands[2]) == CONST_DOUBLE && CONST_INT_P (operands[3]))"
+ !(CONST_DOUBLE_P (operands[2]) && CONST_INT_P (operands[3]))"
"@
daddh%F0%F1 %H6, %H2, %L2
daddh%F0%F1 %H6, %3, %L2"
@@ -576,7 +576,7 @@
(mult:DF (match_dup 1)
(match_dup 2)))])]
"TARGET_DPFP &&
- !(GET_CODE(operands[2]) == CONST_DOUBLE && CONST_INT_P (operands[3]))"
+ !(CONST_DOUBLE_P (operands[2]) && CONST_INT_P (operands[3]))"
"@
dmulh%F0%F1 %H6, %H2, %L2
dmulh%F0%F1 %H6, %3, %L2"
@@ -604,8 +604,8 @@
(minus:DF (match_dup 1)
(match_dup 2)))])]
"TARGET_DPFP &&
- !(GET_CODE(operands[2]) == CONST_DOUBLE && CONST_INT_P (operands[3])) &&
- !(GET_CODE(operands[1]) == CONST_DOUBLE && CONST_INT_P (operands[3]))"
+ !(CONST_DOUBLE_P (operands[2]) && CONST_INT_P (operands[3])) &&
+ !(CONST_DOUBLE_P (operands[1]) && CONST_INT_P (operands[3]))"
"@
dsubh%F0%F1 %H6, %H2, %L2
dsubh%F0%F1 %H6, %3, %L2
diff --git a/gcc/config/bfin/bfin.md b/gcc/config/bfin/bfin.md
index 2adc3273901..b2b5f04d6c5 100644
--- a/gcc/config/bfin/bfin.md
+++ b/gcc/config/bfin/bfin.md
@@ -850,7 +850,7 @@
{
long values;
- gcc_assert (GET_CODE (operands[1]) == CONST_DOUBLE);
+ gcc_assert (CONST_DOUBLE_P (operands[1]));
REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (operands[1]), values);
diff --git a/gcc/config/c6x/c6x.h b/gcc/config/c6x/c6x.h
index c605b73fe5a..06f85e41d76 100644
--- a/gcc/config/c6x/c6x.h
+++ b/gcc/config/c6x/c6x.h
@@ -369,7 +369,7 @@ struct c6x_args {
/* Addressing Modes. */
-#define CONSTANT_ADDRESS_P(x) (CONSTANT_P(x) && GET_CODE(x) != CONST_DOUBLE)
+#define CONSTANT_ADDRESS_P(x) (CONSTANT_P(x) && !CONST_DOUBLE_P (x))
#define MAX_REGS_PER_ADDRESS 2
#define HAVE_PRE_DECREMENT 1
diff --git a/gcc/config/c6x/c6x.md b/gcc/config/c6x/c6x.md
index 56cd0c5e8d6..3707e80697c 100644
--- a/gcc/config/c6x/c6x.md
+++ b/gcc/config/c6x/c6x.md
@@ -550,7 +550,7 @@
{
long values;
- gcc_assert (GET_CODE (operands[1]) == CONST_DOUBLE);
+ gcc_assert (CONST_DOUBLE_P (operands[1]));
REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (operands[1]), values);
diff --git a/gcc/config/cr16/predicates.md b/gcc/config/cr16/predicates.md
index 755ad8fca5e..b1e3193889f 100644
--- a/gcc/config/cr16/predicates.md
+++ b/gcc/config/cr16/predicates.md
@@ -32,7 +32,7 @@
(define_predicate "u4bits_operand"
(match_code "const_int,const_double")
{
- if (GET_CODE (op) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (op))
return cr16_const_double_ok (op);
return (UNSIGNED_INT_FITS_N_BITS(INTVAL (op), 4)) ? 1 : 0;
})
diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c
index 88de088fc9f..67d7c316841 100644
--- a/gcc/config/cris/cris.c
+++ b/gcc/config/cris/cris.c
@@ -1003,7 +1003,7 @@ cris_print_operand (FILE *file, rtx x, int code)
case 'M':
/* Print the least significant part of operand. */
- if (GET_CODE (operand) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operand))
{
fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
return;
@@ -2914,7 +2914,7 @@ cris_split_movdx (rtx *operands)
operand_subword (src, !reverse, TRUE, mode)));
}
/* Constant-to-reg copy. */
- else if (CONST_INT_P (src) || GET_CODE (src) == CONST_DOUBLE)
+ else if (CONST_INT_P (src) || CONST_DOUBLE_P (src))
{
rtx words[2];
split_double (src, &words[0], &words[1]);
diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md
index 12421bf2c3b..0c7ac21b2c7 100644
--- a/gcc/config/cris/cris.md
+++ b/gcc/config/cris/cris.md
@@ -509,7 +509,7 @@
resulting subreg sets when using the construct from mcore (as of FSF
CVS, version -r 1.5), and it believes that the high part (the last one
emitted) is the final value. */
- if ((CONST_INT_P (operands[1]) || GET_CODE (operands[1]) == CONST_DOUBLE)
+ if ((CONST_INT_P (operands[1]) || CONST_DOUBLE_P (operands[1]))
&& ! reload_completed
&& ! reload_in_progress)
{
diff --git a/gcc/config/csky/csky.c b/gcc/config/csky/csky.c
index 5e8b14e7665..85850c8be1f 100644
--- a/gcc/config/csky/csky.c
+++ b/gcc/config/csky/csky.c
@@ -4013,13 +4013,13 @@ csky_output_move (rtx insn ATTRIBUTE_UNUSED, rtx operands[],
}
/* The situation mov integer to reg. */
else if (CONST_INT_P (src) ||
- (GET_CODE (src) == CONST_DOUBLE && GET_MODE (src) == SFmode))
+ (CONST_DOUBLE_P (src) && GET_MODE (src) == SFmode))
{
HOST_WIDE_INT x, y;
const REAL_VALUE_TYPE *d;
long l;
- if (GET_CODE (src) == CONST_DOUBLE && GET_MODE (src) == SFmode)
+ if (CONST_DOUBLE_P (src) && GET_MODE (src) == SFmode)
{
d = CONST_DOUBLE_REAL_VALUE (src);
REAL_VALUE_TO_TARGET_SINGLE (*d, l);
@@ -4141,7 +4141,7 @@ csky_output_ck801_move (rtx insn ATTRIBUTE_UNUSED, rtx operands[],
else
return "lrw\t%0, %x1\t";
}
- else if (GET_CODE (src) == CONST_DOUBLE && GET_MODE (src) == SFmode)
+ else if (CONST_DOUBLE_P (src) && GET_MODE (src) == SFmode)
{
const REAL_VALUE_TYPE *d;
long l;
@@ -4290,7 +4290,7 @@ csky_output_movedouble (rtx operands[],
else
return "ld.w\t%0, %1\n\tld.w\t%R0, %R1";
}
- else if (CONST_INT_P (src) || GET_CODE (src) == CONST_DOUBLE)
+ else if (CONST_INT_P (src) || CONST_DOUBLE_P (src))
{
split_double (src, operands + 2, operands + 3);
@@ -4416,7 +4416,7 @@ csky_output_ck801_movedouble (rtx operands[],
else
return "ld.w\t%0, %1\n\tld.w\t%R0, %R1";
}
- else if (CONST_INT_P (src) || GET_CODE (src) == CONST_DOUBLE)
+ else if (CONST_INT_P (src) || CONST_DOUBLE_P (src))
{
split_double (src, operands + 2, operands + 3);
diff --git a/gcc/config/darwin.c b/gcc/config/darwin.c
index 6eaccd73a9f..3076650abaa 100644
--- a/gcc/config/darwin.c
+++ b/gcc/config/darwin.c
@@ -1752,19 +1752,19 @@ machopic_select_rtx_section (machine_mode mode, rtx x,
if (GET_MODE_SIZE (mode) == 8
&& (CONST_INT_P (x)
|| CONST_WIDE_INT_P (x)
- || GET_CODE (x) == CONST_DOUBLE))
+ || CONST_DOUBLE_P (x)))
return darwin_sections[literal8_section];
else if (GET_MODE_SIZE (mode) == 4
&& (CONST_INT_P (x)
|| CONST_WIDE_INT_P (x)
- || GET_CODE (x) == CONST_DOUBLE))
+ || CONST_DOUBLE_P (x)))
return darwin_sections[literal4_section];
else if (HAVE_GAS_LITERAL16
&& TARGET_64BIT
&& GET_MODE_SIZE (mode) == 16
&& (CONST_INT_P (x)
|| CONST_WIDE_INT_P (x)
- || GET_CODE (x) == CONST_DOUBLE
+ || CONST_DOUBLE_P (x)
|| GET_CODE (x) == CONST_VECTOR))
return darwin_sections[literal16_section];
else if (MACHOPIC_INDIRECT
diff --git a/gcc/config/fr30/fr30.c b/gcc/config/fr30/fr30.c
index 54e5766241f..e31d4f1266d 100644
--- a/gcc/config/fr30/fr30.c
+++ b/gcc/config/fr30/fr30.c
@@ -603,7 +603,7 @@ fr30_print_operand (FILE *file, rtx x, int code)
return;
case 'F':
- if (GET_CODE (x) != CONST_DOUBLE)
+ if (!CONST_DOUBLE_P (x))
output_operand_lossage ("fr30_print_operand: invalid %%F code");
else
{
@@ -879,7 +879,7 @@ fr30_check_multiple_regs (rtx *operands, int num_operands, int descending)
int
fr30_const_double_is_zero (rtx operand)
{
- if (operand == NULL || GET_CODE (operand) != CONST_DOUBLE)
+ if (operand == NULL || !CONST_DOUBLE_P (operand))
return 0;
return real_equal (CONST_DOUBLE_REAL_VALUE (operand), &dconst0);
diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c
index bccd1efa58a..c3d9408f21b 100644
--- a/gcc/config/frv/frv.c
+++ b/gcc/config/frv/frv.c
@@ -2738,7 +2738,7 @@ frv_print_operand (FILE * file, rtx x, int code)
else if (CONST_INT_P (x))
value = INTVAL (x);
- else if (GET_CODE (x) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (x))
{
if (GET_MODE (x) == SFmode)
{
@@ -2976,7 +2976,7 @@ frv_print_operand (FILE * file, rtx x, int code)
case 'x':
/* Print constant in hex. */
- if (CONST_INT_P (x) || GET_CODE (x) == CONST_DOUBLE)
+ if (CONST_INT_P (x) || CONST_DOUBLE_P (x))
{
fprintf (file, "%s0x%.4lx", IMMEDIATE_PREFIX, (long) value);
break;
@@ -2989,7 +2989,7 @@ frv_print_operand (FILE * file, rtx x, int code)
fputs (reg_names [REGNO (x)], file);
else if (CONST_INT_P (x)
- || GET_CODE (x) == CONST_DOUBLE)
+ || CONST_DOUBLE_P (x))
fprintf (file, "%s%ld", IMMEDIATE_PREFIX, (long) value);
else if (frv_const_unspec_p (x, &unspec))
@@ -4253,7 +4253,7 @@ output_move_single (rtx operands[], rtx insn)
}
else if (CONST_INT_P (src)
- || GET_CODE (src) == CONST_DOUBLE)
+ || CONST_DOUBLE_P (src))
{
/* gpr <- integer/floating constant */
HOST_WIDE_INT value;
@@ -4459,7 +4459,7 @@ output_move_double (rtx operands[], rtx insn)
}
else if (CONST_INT_P (src)
- || GET_CODE (src) == CONST_DOUBLE)
+ || CONST_DOUBLE_P (src))
return "#";
}
@@ -6641,7 +6641,7 @@ frv_legitimate_constant_p (machine_mode mode, rtx x)
return LEGITIMATE_PIC_OPERAND_P (x);
/* All of the integer constants are ok. */
- if (GET_CODE (x) != CONST_DOUBLE)
+ if (!CONST_DOUBLE_P (x))
return TRUE;
/* double integer constants are ok. */
diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h
index 219153368ae..7e108211e7b 100644
--- a/gcc/config/frv/frv.h
+++ b/gcc/config/frv/frv.h
@@ -1471,7 +1471,7 @@ __asm__("\n" \
operands when generating position independent code. */
#define LEGITIMATE_PIC_OPERAND_P(X) \
( CONST_INT_P (X) \
- || GET_CODE (X) == CONST_DOUBLE \
+ || CONST_DOUBLE_P (X) \
|| (GET_CODE (X) == HIGH && CONST_INT_P (XEXP (X, 0))) \
|| got12_operand (X, VOIDmode)) \
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index b8ecd299cc0..df0fe33878b 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -2353,7 +2353,7 @@
rtx fma = gen_reg_rtx (<MODE>mode);
rtx rcp;
- bool is_rcp = (GET_CODE (operands[1]) == CONST_DOUBLE
+ bool is_rcp = (CONST_DOUBLE_P (operands[1])
&& real_identical (CONST_DOUBLE_REAL_VALUE (operands[1]),
&dconstm1));
diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c
index 674eed31bc3..8bc1e6b50be 100644
--- a/gcc/config/gcn/gcn.c
+++ b/gcc/config/gcn/gcn.c
@@ -826,7 +826,7 @@ gcn_inline_constant_p (rtx x)
{
if (CONST_INT_P (x))
return INTVAL (x) >= -16 && INTVAL (x) < 64;
- if (GET_CODE (x) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (x))
return gcn_inline_fp_constant_p (x, false);
if (GET_CODE (x) == CONST_VECTOR)
{
@@ -5809,8 +5809,8 @@ print_operand (FILE *file, rtx x, int code)
if either operand is floating point, otherwise assume SImode. */
if (mode == VOIDmode)
{
- if (GET_CODE (XEXP (x, 0)) == CONST_DOUBLE
- || GET_CODE (XEXP (x, 1)) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (XEXP (x, 0))
+ || CONST_DOUBLE_P (XEXP (x, 1)))
mode = SFmode;
else
mode = SImode;
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index e9ee4c707bd..e1206e2b10e 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -1709,7 +1709,7 @@ ia64_expand_movxf_movrf (machine_mode mode, rtx operands[])
return true;
}
- if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[1]))
{
/* Don't word-swap when reading in the constant. */
emit_move_insn (gen_rtx_REG (DImode, REGNO (op0)),
diff --git a/gcc/config/ia64/vect.md b/gcc/config/ia64/vect.md
index 2f8615ed131..8a73129813a 100644
--- a/gcc/config/ia64/vect.md
+++ b/gcc/config/ia64/vect.md
@@ -1306,7 +1306,7 @@
rtx op2 = XVECEXP (operands[1], 0, 1);
rtx x;
- if (GET_CODE (op1) == CONST_DOUBLE && GET_CODE (op2) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (op1) && CONST_DOUBLE_P (op2))
{
x = gen_rtx_CONST_VECTOR (V2SFmode, XVEC (operands[1], 0));
emit_move_insn (operands[0], x);
diff --git a/gcc/config/iq2000/iq2000.md b/gcc/config/iq2000/iq2000.md
index 580f22c0d28..fac0f65159d 100644
--- a/gcc/config/iq2000/iq2000.md
+++ b/gcc/config/iq2000/iq2000.md
@@ -830,7 +830,7 @@
&& !reload_completed
&& GET_CODE (operands[0]) == MEM
&& (GET_CODE (operands[1]) == MEM
- || GET_CODE (operands[1]) == CONST_DOUBLE))
+ || CONST_DOUBLE_P (operands[1])))
operands[1] = copy_to_mode_reg (SFmode, operands[1]);
/* Take care of reg <- SF constant */
diff --git a/gcc/config/lm32/lm32.c b/gcc/config/lm32/lm32.c
index 2b04d48f97e..294f0f46439 100644
--- a/gcc/config/lm32/lm32.c
+++ b/gcc/config/lm32/lm32.c
@@ -521,7 +521,7 @@ lm32_print_operand (FILE * file, rtx op, int letter)
output_address (GET_MODE (op), XEXP (op, 0));
else if (letter == 'z' && CONST_INT_P (op) && INTVAL (op) == 0)
fprintf (file, "%s", reg_names[0]);
- else if (GET_CODE (op) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (op))
{
if ((CONST_DOUBLE_LOW (op) != 0) || (CONST_DOUBLE_HIGH (op) != 0))
output_operand_lossage ("only 0.0 can be loaded as an immediate");
@@ -905,7 +905,7 @@ nonpic_symbol_mentioned_p (rtx x)
/* We don't want to look into the possible MEM location of a
CONST_DOUBLE, since we're not going to use it, in general. */
- if (GET_CODE (x) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (x))
return 0;
if (GET_CODE (x) == UNSPEC)
diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c
index ac18aa286c8..13e5675040e 100644
--- a/gcc/config/m32r/m32r.c
+++ b/gcc/config/m32r/m32r.c
@@ -1092,7 +1092,7 @@ gen_split_move_double (rtx operands[])
}
/* Reg = constant. */
- else if (CONST_INT_P (src) || GET_CODE (src) == CONST_DOUBLE)
+ else if (CONST_INT_P (src) || CONST_DOUBLE_P (src))
{
rtx words[2];
split_double (src, &words[0], &words[1]);
@@ -2140,7 +2140,7 @@ m32r_print_operand (FILE * file, rtx x, int code)
fputs (reg_names[REGNO (x)+1], file);
}
else if (CONST_INT_P (x)
- || GET_CODE (x) == CONST_DOUBLE)
+ || CONST_DOUBLE_P (x))
{
rtx first, second;
@@ -2156,7 +2156,7 @@ m32r_print_operand (FILE * file, rtx x, int code)
{
char str[30];
- if (GET_CODE (x) != CONST_DOUBLE
+ if (!CONST_DOUBLE_P (x)
|| GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT)
fatal_insn ("bad insn for 'A'", x);
diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index fa0e5d2f718..4f757403f7e 100644
--- a/gcc/config/m68k/m68k.c
+++ b/gcc/config/m68k/m68k.c
@@ -3325,7 +3325,7 @@ handle_move_double (rtx operands[2],
}
else if (optype1 == CNSTOP)
{
- if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[1]))
{
long l[3];
@@ -4185,7 +4185,7 @@ notice_update_cc (rtx exp, rtx insn)
&& GET_MODE_SIZE (GET_MODE (SET_SRC (exp))) > 4
&& (GET_CODE (SET_SRC (exp)) == REG
|| GET_CODE (SET_SRC (exp)) == MEM
- || GET_CODE (SET_SRC (exp)) == CONST_DOUBLE))
+ || CONST_DOUBLE_P (SET_SRC (exp))))
CC_STATUS_INIT;
else if (SET_DEST (exp) != pc_rtx)
{
@@ -4508,20 +4508,20 @@ print_operand (FILE *file, rtx op, int letter)
&& INTVAL (XEXP (op, 0)) >= -0x8000))
fprintf (file, MOTOROLA ? ".l" : ":l");
}
- else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == SFmode)
+ else if (CONST_DOUBLE_P (op) && GET_MODE (op) == SFmode)
{
long l;
REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (op), l);
asm_fprintf (file, "%I0x%lx", l & 0xFFFFFFFF);
}
- else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == XFmode)
+ else if (CONST_DOUBLE_P (op) && GET_MODE (op) == XFmode)
{
long l[3];
REAL_VALUE_TO_TARGET_LONG_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l);
asm_fprintf (file, "%I0x%lx%08lx%08lx", l[0] & 0xFFFFFFFF,
l[1] & 0xFFFFFFFF, l[2] & 0xFFFFFFFF);
}
- else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == DFmode)
+ else if (CONST_DOUBLE_P (op) && GET_MODE (op) == DFmode)
{
long l[2];
REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l);
@@ -5293,7 +5293,7 @@ m68k_preferred_reload_class (rtx x, enum reg_class rclass)
return DATA_REGS;
/* ??? Do we really need this now? */
- if (GET_CODE (x) == CONST_DOUBLE
+ if (CONST_DOUBLE_P (x)
&& GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
{
if (TARGET_HARD_FLOAT && reg_class_subset_p (FP_REGS, rclass))
@@ -5562,7 +5562,7 @@ sched_attr_op_type (rtx_insn *insn, bool opx_p, bool address_p)
return OP_TYPE_IMM_L;
}
- if (GET_CODE (op) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (op))
{
switch (GET_MODE (op))
{
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index d3c41028fae..4ed3111c439 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -1171,7 +1171,7 @@
return "f%$move%.x %1,%0";
else if (ADDRESS_REG_P (operands[1]))
return "move%.l %1,%-\;f%$move%.s %+,%0";
- else if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (operands[1]))
return output_move_const_single (operands);
return "f%$move%.s %f1,%0";
}
@@ -1324,7 +1324,7 @@
output_asm_insn ("move%.l %1,%-", operands);
return "f%&move%.d %+,%0";
}
- if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[1]))
return output_move_const_double (operands);
return "f%&move%.d %f1,%0";
}
@@ -1443,7 +1443,7 @@
output_asm_insn ("move%.l %1,%-", operands);
return "fmove%.x %+,%0";
}
- if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[1]))
return "fmove%.x %1,%0";
return "fmove%.x %f1,%0";
}
@@ -1482,7 +1482,7 @@
output_asm_insn ("move%.l %1,%-", operands);
return "fmove%.x %+,%0";
}
- if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[1]))
return "fmove%.x %1,%0";
return "fmove%.x %f1,%0";
}
@@ -1538,7 +1538,7 @@
output_asm_insn ("move%.l %1,%-", operands);
return "fmove%.d %+,%0";
}
- if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[1]))
return output_move_const_double (operands);
return "fmove%.d %f1,%0";
}
@@ -3360,7 +3360,7 @@
(match_operand:DF 2 "general_operand" "fmG")))]
"TARGET_68881"
{
- if (GET_CODE (operands[2]) == CONST_DOUBLE
+ if (CONST_DOUBLE_P (operands[2])
&& floating_exact_log2 (operands[2]) && !TUNE_68040_60)
{
int i = floating_exact_log2 (operands[2]);
@@ -7494,7 +7494,7 @@
return "f%$move%.x %1,%0";
else if (ADDRESS_REG_P (operands[1]))
return "move%.l %1,%-\;f%$move%.s %+,%0";
- else if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (operands[1]))
return output_move_const_single (operands);
return "f%$move%.s %f1,%0";
}
@@ -7530,7 +7530,7 @@
output_asm_insn ("move%.l %1,%-", operands);
return "f%&move%.d %+,%0";
}
- if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[1]))
return output_move_const_double (operands);
return "f%&move%.d %f1,%0";
}
diff --git a/gcc/config/m68k/predicates.md b/gcc/config/m68k/predicates.md
index efda85872d1..a90bf61a948 100644
--- a/gcc/config/m68k/predicates.md
+++ b/gcc/config/m68k/predicates.md
@@ -95,7 +95,7 @@
&& (INTVAL (op) >= 0 && INTVAL (op) <= 0xffffffffL));
#else
return (CONST_INT_P (op)
- || (GET_CODE (op) == CONST_DOUBLE && CONST_DOUBLE_HIGH (op) == 0));
+ || (CONST_DOUBLE_P (op) && CONST_DOUBLE_HIGH (op) == 0));
#endif
})
diff --git a/gcc/config/mcore/mcore.c b/gcc/config/mcore/mcore.c
index 8c249ab2b61..21d15e0a6bb 100644
--- a/gcc/config/mcore/mcore.c
+++ b/gcc/config/mcore/mcore.c
@@ -3203,7 +3203,7 @@ mcore_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
static bool
mcore_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
{
- return GET_CODE (x) != CONST_DOUBLE;
+ return !CONST_DOUBLE_P (x);
}
/* Helper function for `mcore_legitimate_address_p'. */
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
index 0569572337d..529d54cefc4 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
@@ -245,7 +245,7 @@ microblaze_const_double_ok (rtx op, machine_mode mode)
{
REAL_VALUE_TYPE d;
- if (GET_CODE (op) != CONST_DOUBLE)
+ if (!CONST_DOUBLE_P (op))
return 0;
if (GET_MODE (op) == VOIDmode)
@@ -3768,7 +3768,7 @@ microblaze_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
if (microblaze_cannot_force_const_mem(mode, x))
return false;
- if (GET_CODE (x) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (x))
{
return microblaze_const_double_ok (x, GET_MODE (x));
}
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index e0535b18b7f..7f14a077d8d 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -21802,7 +21802,7 @@ mips_msa_vec_parallel_const_half (machine_mode mode, bool high_p)
static inline bool
mips_constant_elt_p (rtx x)
{
- return CONST_INT_P (x) || GET_CODE (x) == CONST_DOUBLE;
+ return CONST_INT_P (x) || CONST_DOUBLE_P (x);
}
/* A subroutine of mips_expand_vec_init, expand via broadcast. */
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index e17b1d522f0..8393e8b4362 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -7447,7 +7447,7 @@
UNSPEC_CONSTTABLE_FLOAT)]
"TARGET_MIPS16"
{
- gcc_assert (GET_CODE (operands[0]) == CONST_DOUBLE);
+ gcc_assert (CONST_DOUBLE_P (operands[0]));
assemble_real (*CONST_DOUBLE_REAL_VALUE (operands[0]),
as_a <scalar_float_mode> (GET_MODE (operands[0])),
GET_MODE_BITSIZE (GET_MODE (operands[0])));
diff --git a/gcc/config/mmix/mmix.c b/gcc/config/mmix/mmix.c
index bf443613d84..5da6713b5a2 100644
--- a/gcc/config/mmix/mmix.c
+++ b/gcc/config/mmix/mmix.c
@@ -1064,7 +1064,7 @@ mmix_constant_address_p (rtx x)
if ((GET_CODE (x0) == SYMBOL_REF
|| GET_CODE (x0) == LABEL_REF)
&& (CONST_INT_P (x1)
- || (GET_CODE (x1) == CONST_DOUBLE
+ || (CONST_DOUBLE_P (x1)
&& GET_MODE (x1) == VOIDmode)))
addend = mmix_intval (x1);
else
@@ -1437,7 +1437,7 @@ mmix_assemble_integer (rtx x, unsigned int size, int aligned_p)
/* We don't get here anymore for CONST_DOUBLE, because DImode
isn't expressed as CONST_DOUBLE, and DFmode is handled
elsewhere. */
- gcc_assert (GET_CODE (x) != CONST_DOUBLE);
+ gcc_assert (!CONST_DOUBLE_P (x));
assemble_integer_with_op ("\tOCTA\t", x);
return true;
}
@@ -1705,7 +1705,7 @@ mmix_print_operand (FILE *stream, rtx x, int code)
case 'I':
/* Output the constant. Note that we use this for floats as well. */
if (!CONST_INT_P (x)
- && (GET_CODE (x) != CONST_DOUBLE
+ && (!CONST_DOUBLE_P (x)
|| (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode
&& GET_MODE (x) != SFmode)))
fatal_insn ("MMIX Internal: Expected a constant, not this", x);
@@ -2749,10 +2749,10 @@ mmix_intval (const_rtx x)
/* We make a little song and dance because converting to long long in
gcc-2.7.2 is broken. I still want people to be able to use it for
cross-compilation to MMIX. */
- if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode)
+ if (CONST_DOUBLE_P (x) && GET_MODE (x) == VOIDmode)
return CONST_DOUBLE_HIGH (x);
- if (GET_CODE (x) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (x))
{
if (GET_MODE (x) == DFmode)
{
diff --git a/gcc/config/mmix/predicates.md b/gcc/config/mmix/predicates.md
index c572b7b07b1..f74c771f30f 100644
--- a/gcc/config/mmix/predicates.md
+++ b/gcc/config/mmix/predicates.md
@@ -113,7 +113,7 @@
if ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
|| GET_CODE (XEXP (op, 0)) == LABEL_REF)
&& (CONST_INT_P (XEXP (op, 1))
- || (GET_CODE (XEXP (op, 1)) == CONST_DOUBLE
+ || (CONST_DOUBLE_P (XEXP (op, 1))
&& GET_MODE (XEXP (op, 1)) == VOIDmode)))
return 1;
/* Fall through. */
diff --git a/gcc/config/nds32/constraints.md b/gcc/config/nds32/constraints.md
index b5010c0edb7..be1860e8117 100644
--- a/gcc/config/nds32/constraints.md
+++ b/gcc/config/nds32/constraints.md
@@ -273,7 +273,7 @@
(define_constraint "Chig"
"The immediate value that can be simply set high 20-bit"
(and (match_code "high")
- (match_test "GET_CODE (XEXP (op, 0)) == CONST_DOUBLE")))
+ (match_test "CONST_DOUBLE_P (XEXP (op, 0))")))
(define_constraint "Izeb"
"The immediate value 0xff"
diff --git a/gcc/config/nds32/nds32-predicates.c b/gcc/config/nds32/nds32-predicates.c
index 8d02ce5a77b..d99a70a2b62 100644
--- a/gcc/config/nds32/nds32-predicates.c
+++ b/gcc/config/nds32/nds32-predicates.c
@@ -506,7 +506,7 @@ bool
nds32_const_double_range_ok_p (rtx op, machine_mode mode,
HOST_WIDE_INT lower, HOST_WIDE_INT upper)
{
- if (GET_CODE (op) != CONST_DOUBLE
+ if (!CONST_DOUBLE_P (op)
|| GET_MODE (op) != mode)
return false;
diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c
index c3a9d27f137..5b1dfedf30d 100644
--- a/gcc/config/nds32/nds32.c
+++ b/gcc/config/nds32/nds32.c
@@ -3578,7 +3578,7 @@ nds32_print_operand (FILE *stream, rtx x, int code)
break;
case HIGH:
- if (GET_CODE (XEXP (x, 0)) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (XEXP (x, 0)))
{
const REAL_VALUE_TYPE *rv;
long val;
diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h
index 6e62258f8d3..60a5f19cfd8 100644
--- a/gcc/config/nds32/nds32.h
+++ b/gcc/config/nds32/nds32.h
@@ -1440,7 +1440,7 @@ enum reg_class
#define USE_STORE_POST_DECREMENT(mode) USE_LOAD_POST_DECREMENT(mode)
#define USE_STORE_POST_INCREMENT(mode) USE_LOAD_POST_INCREMENT(mode)
-#define CONSTANT_ADDRESS_P(x) (CONSTANT_P (x) && GET_CODE (x) != CONST_DOUBLE)
+#define CONSTANT_ADDRESS_P(x) (CONSTANT_P (x) && !CONST_DOUBLE_P (x))
#define MAX_REGS_PER_ADDRESS 3
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 565221e7fb2..ff5bfedd06d 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -2384,7 +2384,7 @@ pa_singlemove_string (rtx *operands)
return "stw %r1,%0";
if (GET_CODE (operands[1]) == MEM)
return "ldw %1,%0";
- if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[1]))
{
long i;
@@ -6055,7 +6055,7 @@ pa_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i,
a few patterns that accept constant double operands. */
if (flag_pic
&& FP_REG_CLASS_P (rclass)
- && (CONST_INT_P (x) || GET_CODE (x) == CONST_DOUBLE))
+ && (CONST_INT_P (x) || CONST_DOUBLE_P (x)))
{
switch (mode)
{
@@ -10364,7 +10364,7 @@ pa_legitimate_constant_p (machine_mode mode, rtx x)
if (tls_referenced_p (x))
return false;
- if (TARGET_64BIT && GET_CODE (x) == CONST_DOUBLE)
+ if (TARGET_64BIT && CONST_DOUBLE_P (x))
return false;
if (TARGET_64BIT
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 4174d590efb..0ce8b635411 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -3837,7 +3837,7 @@
"fG,*rG,f,*r,*r,RT,o,RQ,f,*r"))]
"(register_operand (operands[0], DFmode)
|| reg_or_0_operand (operands[1], DFmode))
- && !(GET_CODE (operands[1]) == CONST_DOUBLE
+ && !(CONST_DOUBLE_P (operands[1])
&& GET_CODE (operands[0]) == MEM)
&& !TARGET_64BIT
&& !TARGET_SOFT_FLOAT"
@@ -4291,7 +4291,7 @@
{
/* Don't output a 64-bit constant, since we can't trust the assembler to
handle it correctly. */
- if (GET_CODE (operands[2]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[2]))
operands[2] = GEN_INT (CONST_DOUBLE_LOW (operands[2]));
else if (HOST_BITS_PER_WIDE_INT > 32
&& CONST_INT_P (operands[2]))
diff --git a/gcc/config/pdp11/pdp11.c b/gcc/config/pdp11/pdp11.c
index 53be7e7752a..4fcd9ed33d5 100644
--- a/gcc/config/pdp11/pdp11.c
+++ b/gcc/config/pdp11/pdp11.c
@@ -537,7 +537,7 @@ pdp11_expand_operands (rtx *operands, rtx exops[][2],
if (REG_P (operands[op]))
optype = REGOP;
else if (CONST_INT_P (operands[op])
- || GET_CODE (operands[op]) == CONST_DOUBLE)
+ || CONST_DOUBLE_P (operands[op]))
optype = CNSTOP;
else if (GET_CODE (XEXP (operands[op], 0)) == POST_INC)
optype = POPOP;
@@ -583,7 +583,7 @@ pdp11_expand_operands (rtx *operands, rtx exops[][2],
optype = OFFSOP;
}
- if (GET_CODE (operands[op]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[op]))
{
gcc_assert (GET_MODE (operands[op]) != VOIDmode);
REAL_VALUE_TO_TARGET_DOUBLE
@@ -606,7 +606,7 @@ pdp11_expand_operands (rtx *operands, rtx exops[][2],
exops[i][op] = adjust_address (operands[op], HImode, w * 2);
else if (optype == CNSTOP)
{
- if (GET_CODE (operands[op]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[op]))
{
sh = 16 - (w & 1) * 16;
exops[i][op] = gen_rtx_CONST_INT (HImode, (sval[w / 2] >> sh) & 0xffff);
@@ -801,7 +801,7 @@ pdp11_asm_print_operand (FILE *file, rtx x, int code)
fprintf (file, "%s", reg_names[REGNO (x)]);
else if (GET_CODE (x) == MEM)
output_address (GET_MODE (x), XEXP (x, 0));
- else if (GET_CODE (x) == CONST_DOUBLE && FLOAT_MODE_P (GET_MODE (x)))
+ else if (CONST_DOUBLE_P (x) && FLOAT_MODE_P (GET_MODE (x)))
{
REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (x), sval);
if (TARGET_DEC_ASM)
@@ -2376,7 +2376,7 @@ pdp11_file_end (void)
static bool
pdp11_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
{
- return GET_CODE (x) != CONST_DOUBLE || legitimate_const_double_p (x);
+ return !CONST_DOUBLE_P (x) || legitimate_const_double_p (x);
}
/* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 4c55707367d..ff6d41ea6f0 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -4181,7 +4181,7 @@ legitimate_reload_constant_p (rtx op)
return true;
/* Accept floating-point zero operands that fit into a single GPR. */
- if (GET_CODE (op) == CONST_DOUBLE
+ if (CONST_DOUBLE_P (op)
&& s390_float_const_zero_p (op)
&& GET_MODE_SIZE (GET_MODE (op)) <= UNITS_PER_WORD)
return true;
@@ -4214,7 +4214,7 @@ legitimate_reload_fp_constant_p (rtx op)
can be used. Prior to z196 the load fp zero instruction caused a
performance penalty if the result is used as BFP number. */
if (TARGET_Z196
- && GET_CODE (op) == CONST_DOUBLE
+ && CONST_DOUBLE_P (op)
&& s390_float_const_zero_p (op))
return true;
@@ -4417,7 +4417,7 @@ s390_reload_symref_address (rtx reg, rtx mem, rtx scratch, bool tomem)
{
/* Reload might have pulled a constant out of the literal pool.
Force it back in. */
- if (CONST_INT_P (mem) || GET_CODE (mem) == CONST_DOUBLE
+ if (CONST_INT_P (mem) || CONST_DOUBLE_P (mem)
|| CONST_WIDE_INT_P (mem)
|| GET_CODE (mem) == CONST_VECTOR
|| GET_CODE (mem) == CONST)
@@ -9269,7 +9269,7 @@ s390_output_pool_entry (rtx exp, machine_mode mode, unsigned int align)
{
case MODE_FLOAT:
case MODE_DECIMAL_FLOAT:
- gcc_assert (GET_CODE (exp) == CONST_DOUBLE);
+ gcc_assert (CONST_DOUBLE_P (exp));
assemble_real (*CONST_DOUBLE_REAL_VALUE (exp),
as_a <scalar_float_mode> (mode), align);
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index dfaeab55142..3e2ffcff0f1 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -4803,7 +4803,7 @@ broken_move (rtx_insn *insn)
&& XINT (SET_SRC (pat), 1) == UNSPEC_MOVA
&& GET_CODE (XVECEXP (SET_SRC (pat), 0, 0)) == CONST))
&& ! (TARGET_SH2E
- && GET_CODE (SET_SRC (pat)) == CONST_DOUBLE
+ && CONST_DOUBLE_P (SET_SRC (pat))
&& (fp_zero_operand (SET_SRC (pat))
|| fp_one_operand (SET_SRC (pat)))
/* In general we don't know the current setting of fpscr, so
@@ -9102,7 +9102,7 @@ nonpic_symbol_mentioned_p (rtx x)
/* We don't want to look into the possible MEM location of a
CONST_DOUBLE, since we're not going to use it, in general. */
- if (GET_CODE (x) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (x))
return false;
if (GET_CODE (x) == UNSPEC
@@ -11442,7 +11442,7 @@ sh_movsf_ie_ra_split_p (rtx op0, rtx op1, rtx op2)
if (rtx_equal_p (op0, op1))
return true;
/* fy, FQ, reg */
- if (GET_CODE (op1) == CONST_DOUBLE
+ if (CONST_DOUBLE_P (op1)
&& ! satisfies_constraint_G (op1)
&& ! satisfies_constraint_H (op1)
&& REG_P (op0)
@@ -11517,7 +11517,7 @@ sh_legitimate_constant_p (machine_mode mode, rtx x)
&& SYMBOLIC_CONST_P (XEXP (XEXP (x, 0), 0)))))
return false;
- return GET_CODE (x) != CONST_DOUBLE
+ return !CONST_DOUBLE_P (x)
|| mode == DFmode || mode == SFmode
|| mode == DImode || GET_MODE (x) == VOIDmode;
}
diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index 0204872eae7..37bfc02de98 100644
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -1372,7 +1372,7 @@ extern bool current_function_interrupt;
#define IS_NON_EXPLICIT_CONSTANT_P(OP) \
(CONSTANT_P (OP) \
&& !CONST_INT_P (OP) \
- && GET_CODE (OP) != CONST_DOUBLE \
+ && !CONST_DOUBLE_P (OP) \
&& (!flag_pic \
|| (LEGITIMATE_PIC_OPERAND_P (OP) \
&& !PIC_ADDR_P (OP) \
diff --git a/gcc/config/sparc/predicates.md b/gcc/config/sparc/predicates.md
index e19e8fdffb3..09c3312f955 100644
--- a/gcc/config/sparc/predicates.md
+++ b/gcc/config/sparc/predicates.md
@@ -401,7 +401,7 @@
return true;
/* Allow FP constants to be built in integer registers. */
- if (mclass == MODE_FLOAT && GET_CODE (op) == CONST_DOUBLE)
+ if (mclass == MODE_FLOAT && CONST_DOUBLE_P (op))
return true;
if (mclass == MODE_VECTOR_INT && const_all_ones_operand (op, mode))
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index dc833072f8c..7326d83a96f 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -2138,7 +2138,7 @@ v9_regcmp_p (enum rtx_code code)
int
fp_sethi_p (rtx op)
{
- if (GET_CODE (op) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (op))
{
long i;
@@ -2156,7 +2156,7 @@ fp_sethi_p (rtx op)
int
fp_mov_p (rtx op)
{
- if (GET_CODE (op) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (op))
{
long i;
@@ -2177,7 +2177,7 @@ fp_high_losum_p (rtx op)
/* The constraints calling this should only be in
SFmode move insns, so any constant which cannot
be moved using a single insn will do. */
- if (GET_CODE (op) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (op))
{
long i;
@@ -9644,7 +9644,7 @@ sparc_print_operand (FILE *file, rtx x, int code)
output_addr_const (file, XEXP (x, 1));
fputc (')', file);
}
- else if (GET_CODE (x) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (x))
output_operand_lossage ("floating-point constant not a valid immediate operand");
else
output_addr_const (file, x);
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 14ce445d1e2..60220904346 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -2384,7 +2384,7 @@ visl")
"(register_operand (operands[0], SFmode)
|| register_or_zero_or_all_ones_operand (operands[1], SFmode))"
{
- if (GET_CODE (operands[1]) == CONST_DOUBLE
+ if (CONST_DOUBLE_P (operands[1])
&& (which_alternative == 3
|| which_alternative == 4
|| which_alternative == 5))
diff --git a/gcc/config/spu/predicates.md b/gcc/config/spu/predicates.md
index 0d4314be398..6a2b38eadef 100644
--- a/gcc/config/spu/predicates.md
+++ b/gcc/config/spu/predicates.md
@@ -75,7 +75,7 @@
{
if (spu_reg_operand (op, mode))
return 1;
- if (CONST_INT_P (op) || GET_CODE (op) == CONST_DOUBLE
+ if (CONST_INT_P (op) || CONST_DOUBLE_P (op)
|| GET_CODE (op) == CONST_VECTOR)
return logical_immediate_p (op, mode);
return 0;
@@ -86,7 +86,7 @@
{
if (spu_reg_operand (op, mode))
return 1;
- if (CONST_INT_P (op) || GET_CODE (op) == CONST_DOUBLE
+ if (CONST_INT_P (op) || CONST_DOUBLE_P (op)
|| GET_CODE (op) == CONST_VECTOR)
return logical_immediate_p (op, mode)
|| iohl_immediate_p (op, mode);
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index e6b25ab3b98..b2ca39a6fb0 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -3175,7 +3175,7 @@ classify_immediate (rtx op, machine_mode mode)
&& mode == V4SImode
&& GET_CODE (op) == CONST_VECTOR
&& !CONST_INT_P (CONST_VECTOR_ELT (op, 0))
- && GET_CODE (CONST_VECTOR_ELT (op, 0)) != CONST_DOUBLE)
+ && !CONST_DOUBLE_P (CONST_VECTOR_ELT (op, 0)))
op = unwrap_const_vec_duplicate (op);
switch (GET_CODE (op))
@@ -3206,7 +3206,7 @@ classify_immediate (rtx op, machine_mode mode)
case CONST_VECTOR:
for (i = 0; i < GET_MODE_NUNITS (mode); i++)
if (!CONST_INT_P (CONST_VECTOR_ELT (op, i))
- && GET_CODE (CONST_VECTOR_ELT (op, i)) != CONST_DOUBLE)
+ && !CONST_DOUBLE_P (CONST_VECTOR_ELT (op, i)))
return IC_POOL;
/* Fall through. */
@@ -3290,7 +3290,7 @@ const_vector_immediate_p (rtx x)
gcc_assert (GET_CODE (x) == CONST_VECTOR);
for (i = 0; i < GET_MODE_NUNITS (GET_MODE (x)); i++)
if (!CONST_INT_P (CONST_VECTOR_ELT (x, i))
- && GET_CODE (CONST_VECTOR_ELT (x, i)) != CONST_DOUBLE)
+ && !CONST_DOUBLE_P (CONST_VECTOR_ELT (x, i)))
return 0;
return 1;
}
@@ -3302,7 +3302,7 @@ logical_immediate_p (rtx op, machine_mode mode)
unsigned char arr[16];
int i, j;
- gcc_assert (CONST_INT_P (op) || GET_CODE (op) == CONST_DOUBLE
+ gcc_assert (CONST_INT_P (op) || CONST_DOUBLE_P (op)
|| GET_CODE (op) == CONST_VECTOR);
if (GET_CODE (op) == CONST_VECTOR
@@ -3334,7 +3334,7 @@ iohl_immediate_p (rtx op, machine_mode mode)
unsigned char arr[16];
int i, j;
- gcc_assert (CONST_INT_P (op) || GET_CODE (op) == CONST_DOUBLE
+ gcc_assert (CONST_INT_P (op) || CONST_DOUBLE_P (op)
|| GET_CODE (op) == CONST_VECTOR);
if (GET_CODE (op) == CONST_VECTOR
@@ -3366,7 +3366,7 @@ arith_immediate_p (rtx op, machine_mode mode,
unsigned char arr[16];
int bytes, i, j;
- gcc_assert (CONST_INT_P (op) || GET_CODE (op) == CONST_DOUBLE
+ gcc_assert (CONST_INT_P (op) || CONST_DOUBLE_P (op)
|| GET_CODE (op) == CONST_VECTOR);
if (GET_CODE (op) == CONST_VECTOR
@@ -3407,7 +3407,7 @@ exp2_immediate_p (rtx op, machine_mode mode, int low, int high)
unsigned char arr[16];
int bytes, i, j;
- gcc_assert (CONST_INT_P (op) || GET_CODE (op) == CONST_DOUBLE
+ gcc_assert (CONST_INT_P (op) || CONST_DOUBLE_P (op)
|| GET_CODE (op) == CONST_VECTOR);
if (GET_CODE (op) == CONST_VECTOR
@@ -5030,12 +5030,12 @@ constant_to_array (machine_mode mode, rtx x, unsigned char arr[16])
memset (arr, 0, 16);
mode = GET_MODE (x) != VOIDmode ? GET_MODE (x) : mode;
if (CONST_INT_P (x)
- || (GET_CODE (x) == CONST_DOUBLE
+ || (CONST_DOUBLE_P (x)
&& (mode == SFmode || mode == DFmode)))
{
gcc_assert (mode != VOIDmode && mode != BLKmode);
- if (GET_CODE (x) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (x))
val = const_double_to_hwint (x);
else
val = INTVAL (x);
@@ -5052,7 +5052,7 @@ constant_to_array (machine_mode mode, rtx x, unsigned char arr[16])
j = (j == first) ? 0 : j + 1;
}
}
- else if (GET_CODE (x) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (x))
{
val = CONST_DOUBLE_LOW (x);
for (i = 15; i >= 8; i--)
@@ -5076,9 +5076,9 @@ constant_to_array (machine_mode mode, rtx x, unsigned char arr[16])
for (i = 0; i < units; i++)
{
elt = CONST_VECTOR_ELT (x, i);
- if (CONST_INT_P (elt) || GET_CODE (elt) == CONST_DOUBLE)
+ if (CONST_INT_P (elt) || CONST_DOUBLE_P (elt))
{
- if (GET_CODE (elt) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (elt))
val = const_double_to_hwint (elt);
else
val = INTVAL (elt);
@@ -5651,7 +5651,7 @@ void
spu_builtin_splats (rtx ops[])
{
machine_mode mode = GET_MODE (ops[0]);
- if (CONST_INT_P (ops[1]) || GET_CODE (ops[1]) == CONST_DOUBLE)
+ if (CONST_INT_P (ops[1]) || CONST_DOUBLE_P (ops[1]))
{
unsigned char arr[16];
constant_to_array (GET_MODE_INNER (mode), ops[1], arr);
@@ -5984,7 +5984,7 @@ spu_expand_vector_init (rtx target, rtx vals)
{
x = XVECEXP (vals, 0, i);
if (!(CONST_INT_P (x)
- || GET_CODE (x) == CONST_DOUBLE
+ || CONST_DOUBLE_P (x)
|| CONST_FIXED_P (x)))
++n_var;
else
@@ -6025,7 +6025,7 @@ spu_expand_vector_init (rtx target, rtx vals)
{
x = XVECEXP (constant_parts_rtx, 0, i);
if (!(CONST_INT_P (x)
- || GET_CODE (x) == CONST_DOUBLE
+ || CONST_DOUBLE_P (x)
|| CONST_FIXED_P (x)))
XVECEXP (constant_parts_rtx, 0, i) = first_constant;
}
@@ -6045,7 +6045,7 @@ spu_expand_vector_init (rtx target, rtx vals)
{
x = XVECEXP (vals, 0, i);
if (!(CONST_INT_P (x)
- || GET_CODE (x) == CONST_DOUBLE
+ || CONST_DOUBLE_P (x)
|| CONST_FIXED_P (x)))
{
if (!register_operand (x, GET_MODE (x)))
diff --git a/gcc/config/tilegx/tilegx.c b/gcc/config/tilegx/tilegx.c
index 6da91390b18..cdc7561e54e 100644
--- a/gcc/config/tilegx/tilegx.c
+++ b/gcc/config/tilegx/tilegx.c
@@ -5255,7 +5255,7 @@ tilegx_print_operand (FILE *file, rtx x, int code)
HOST_WIDE_INT i;
if (CONST_INT_P (x))
i = INTVAL (x);
- else if (GET_CODE (x) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (x))
i = CONST_DOUBLE_LOW (x);
else
{
@@ -5297,7 +5297,7 @@ tilegx_print_operand (FILE *file, rtx x, int code)
HOST_WIDE_INT i;
if (CONST_INT_P (x))
i = INTVAL (x);
- else if (GET_CODE (x) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (x))
i = CONST_DOUBLE_LOW (x);
else if (GET_CODE (x) == CONST_VECTOR
&& CONST_INT_P (CONST_VECTOR_ELT (x, 0)))
diff --git a/gcc/config/tilepro/tilepro.c b/gcc/config/tilepro/tilepro.c
index f86461f07d4..6473ff20fff 100644
--- a/gcc/config/tilepro/tilepro.c
+++ b/gcc/config/tilepro/tilepro.c
@@ -4523,7 +4523,7 @@ tilepro_print_operand (FILE *file, rtx x, int code)
HOST_WIDE_INT i;
if (CONST_INT_P (x))
i = INTVAL (x);
- else if (GET_CODE (x) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (x))
i = CONST_DOUBLE_LOW (x);
else
{
@@ -4617,7 +4617,7 @@ tilepro_print_operand (FILE *file, rtx x, int code)
HOST_WIDE_INT i;
if (CONST_INT_P (x))
i = INTVAL (x);
- else if (GET_CODE (x) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (x))
i = CONST_DOUBLE_LOW (x);
else if (GET_CODE (x) == CONST_VECTOR
&& CONST_INT_P (CONST_VECTOR_ELT (x, 0)))
diff --git a/gcc/config/v850/predicates.md b/gcc/config/v850/predicates.md
index d662ad0308d..66edd7cbe09 100644
--- a/gcc/config/v850/predicates.md
+++ b/gcc/config/v850/predicates.md
@@ -25,7 +25,7 @@
if (CONST_INT_P (op))
return INTVAL (op) == 0;
- else if (GET_CODE (op) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (op))
return satisfies_constraint_G (op);
else
@@ -477,7 +477,7 @@
(define_predicate "const_float_1_operand"
(match_code "const_double")
{
- if (GET_CODE (op) != CONST_DOUBLE
+ if (!CONST_DOUBLE_P (op)
|| mode != GET_MODE (op)
|| (mode != DFmode && mode != SFmode))
return 0;
diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c
index bf9fbea608d..ea2222cca1d 100644
--- a/gcc/config/v850/v850.c
+++ b/gcc/config/v850/v850.c
@@ -264,7 +264,7 @@ v850_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
static void
const_double_split (rtx x, HOST_WIDE_INT * p_high, HOST_WIDE_INT * p_low)
{
- if (GET_CODE (x) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (x))
{
long t[2];
@@ -843,7 +843,7 @@ output_move_single (rtx * operands)
return "movhi hi(%1),%.,%0\n\tmovea lo(%1),%0,%0";
}
- else if (GET_CODE (src) == CONST_DOUBLE && GET_MODE (src) == SFmode)
+ else if (CONST_DOUBLE_P (src) && GET_MODE (src) == SFmode)
{
HOST_WIDE_INT high, low;
@@ -901,7 +901,7 @@ output_move_single (rtx * operands)
else if (CONST_INT_P (src) && INTVAL (src) == 0)
return "%S0st%W0 %.,%0";
- else if (GET_CODE (src) == CONST_DOUBLE
+ else if (CONST_DOUBLE_P (src)
&& CONST0_RTX (GET_MODE (dst)) == src)
return "%S0st%W0 %.,%0";
}
@@ -3020,7 +3020,7 @@ v850_issue_rate (void)
static bool
v850_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
{
- return (GET_CODE (x) == CONST_DOUBLE
+ return (CONST_DOUBLE_P (x)
|| !(GET_CODE (x) == CONST
&& GET_CODE (XEXP (x, 0)) == PLUS
&& GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c
index 9559ffb9bb4..3cee73c2e23 100644
--- a/gcc/config/vax/vax.c
+++ b/gcc/config/vax/vax.c
@@ -536,14 +536,14 @@ print_operand (FILE *file, rtx x, int code)
fprintf (file, "%s", reg_names[REGNO (x)]);
else if (MEM_P (x))
output_address (GET_MODE (x), XEXP (x, 0));
- else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode)
+ else if (CONST_DOUBLE_P (x) && GET_MODE (x) == SFmode)
{
char dstr[30];
real_to_decimal (dstr, CONST_DOUBLE_REAL_VALUE (x),
sizeof (dstr), 0, 1);
fprintf (file, "$0f%s", dstr);
}
- else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode)
+ else if (CONST_DOUBLE_P (x) && GET_MODE (x) == DFmode)
{
char dstr[30];
real_to_decimal (dstr, CONST_DOUBLE_REAL_VALUE (x),
@@ -632,7 +632,7 @@ vax_float_literal (rtx c)
REAL_VALUE_TYPE s;
int i;
- if (GET_CODE (c) != CONST_DOUBLE)
+ if (!CONST_DOUBLE_P (c))
return false;
mode = GET_MODE (c);
@@ -1149,12 +1149,12 @@ vax_output_int_move (rtx insn ATTRIBUTE_UNUSED, rtx *operands,
return "clrq %0";
if (TARGET_QMATH && optimize_size
&& (CONST_INT_P (operands[1])
- || GET_CODE (operands[1]) == CONST_DOUBLE))
+ || CONST_DOUBLE_P (operands[1])))
{
unsigned HOST_WIDE_INT hval, lval;
int n;
- if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (operands[1]))
{
gcc_assert (HOST_BITS_PER_WIDE_INT != 64);
@@ -1217,7 +1217,7 @@ vax_output_int_move (rtx insn ATTRIBUTE_UNUSED, rtx *operands,
|| !illegal_addsub_di_memory_operand (operands[0], DImode))
&& ((CONST_INT_P (operands[1])
&& (unsigned HOST_WIDE_INT) INTVAL (operands[1]) >= 64)
- || GET_CODE (operands[1]) == CONST_DOUBLE))
+ || CONST_DOUBLE_P (operands[1])))
{
hi[0] = operands[0];
hi[1] = operands[1];
diff --git a/gcc/config/vax/vax.md b/gcc/config/vax/vax.md
index 298f3393d2d..4017a72e08f 100644
--- a/gcc/config/vax/vax.md
+++ b/gcc/config/vax/vax.md
@@ -488,7 +488,7 @@
(sign_extend:DI
(match_operand:SI 2 "nonimmediate_operand" "nrmT")))
(match_operand:DI 3 "immediate_operand" "F")))]
- "GET_CODE (operands[3]) == CONST_DOUBLE
+ "CONST_DOUBLE_P (operands[3])
&& CONST_DOUBLE_HIGH (operands[3]) == (CONST_DOUBLE_LOW (operands[3]) >> 31)"
"*
{
diff --git a/gcc/config/visium/visium.c b/gcc/config/visium/visium.c
index 48e02e04689..3362843f488 100644
--- a/gcc/config/visium/visium.c
+++ b/gcc/config/visium/visium.c
@@ -2232,7 +2232,7 @@ visium_expand_copysign (rtx *operands, machine_mode mode)
gcc_assert (mode == SFmode);
/* First get all the non-sign bits of op1. */
- if (GET_CODE (op1) == CONST_DOUBLE)
+ if (CONST_DOUBLE_P (op1))
{
if (real_isneg (CONST_DOUBLE_REAL_VALUE (op1)))
op1 = simplify_unary_operation (ABS, mode, op1, mode);
diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 802323c2f8e..ba983ad3ac9 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -2453,7 +2453,7 @@ print_operand (FILE *file, rtx x, int letter)
printx (file, INTVAL (x));
fputs (letter == 't' ? "@h" : "@l", file);
}
- else if (GET_CODE (x) == CONST_DOUBLE)
+ else if (CONST_DOUBLE_P (x))
{
if (GET_MODE (x) == SFmode)
{
@@ -2489,7 +2489,7 @@ print_operand (FILE *file, rtx x, int letter)
break;
case 'y':
- if (GET_CODE (x) == CONST_DOUBLE &&
+ if (CONST_DOUBLE_P (x) &&
GET_MODE (x) == SFmode)
{
long l;
@@ -2636,7 +2636,7 @@ xtensa_output_literal (FILE *file, rtx x, machine_mode mode, int labelno)
switch (GET_MODE_CLASS (mode))
{
case MODE_FLOAT:
- gcc_assert (GET_CODE (x) == CONST_DOUBLE);
+ gcc_assert (CONST_DOUBLE_P (x));
switch (mode)
{
diff --git a/gcc/defaults.h b/gcc/defaults.h
index af7ea185f1e..f4bdc7b0247 100644
--- a/gcc/defaults.h
+++ b/gcc/defaults.h
@@ -1170,7 +1170,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
/* For most ports anything that evaluates to a constant symbolic
or integer value is acceptable as a constant address. */
#ifndef CONSTANT_ADDRESS_P
-#define CONSTANT_ADDRESS_P(X) (CONSTANT_P (X) && GET_CODE (X) != CONST_DOUBLE)
+#define CONSTANT_ADDRESS_P(X) (CONSTANT_P (X) && !CONST_DOUBLE_P (X))
#endif
#ifndef MAX_FIXED_MODE_SIZE
diff --git a/gcc/genpreds.c b/gcc/genpreds.c
index 556c4bdd869..82ed58f4960 100644
--- a/gcc/genpreds.c
+++ b/gcc/genpreds.c
@@ -1247,14 +1247,14 @@ write_tm_constrs_h (void)
error ("you can't use lval or hval");
#else
if (needs_hval)
- puts (" if (GET_CODE (op) == CONST_DOUBLE && mode == VOIDmode)"
+ puts (" if (CONST_DOUBLE_P (op) && mode == VOIDmode)"
" hval = CONST_DOUBLE_HIGH (op);");
if (needs_lval)
- puts (" if (GET_CODE (op) == CONST_DOUBLE && mode == VOIDmode)"
+ puts (" if (CONST_DOUBLE_P (op) && mode == VOIDmode)"
" lval = CONST_DOUBLE_LOW (op);");
#endif
if (needs_rval)
- puts (" if (GET_CODE (op) == CONST_DOUBLE && mode != VOIDmode)"
+ puts (" if (CONST_DOUBLE_P (op) && mode != VOIDmode)"
" rval = CONST_DOUBLE_REAL_VALUE (op);");
write_predicate_stmts (c->exp);
diff --git a/gcc/recog.c b/gcc/recog.c
index a9f584bc0dc..dffe8bfde75 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -1213,7 +1213,7 @@ const_scalar_int_operand (rtx op, machine_mode mode)
int
const_double_operand (rtx op, machine_mode mode)
{
- return (GET_CODE (op) == CONST_DOUBLE)
+ return (CONST_DOUBLE_P (op))
&& (GET_MODE (op) == mode || mode == VOIDmode);
}
#else
diff --git a/gcc/reg-stack.c b/gcc/reg-stack.c
index 710f14a9544..c730b324cc0 100644
--- a/gcc/reg-stack.c
+++ b/gcc/reg-stack.c
@@ -908,7 +908,7 @@ emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg)
i1src = XEXP (i1src, 0);
if (REG_P (i1dest)
&& REGNO (i1dest) == FIRST_STACK_REG
- && (MEM_P (i1src) || GET_CODE (i1src) == CONST_DOUBLE)
+ && (MEM_P (i1src) || CONST_DOUBLE_P (i1src))
&& !side_effects_p (i1src)
&& hard_regno == FIRST_STACK_REG + 1
&& i1 != BB_HEAD (current_block))
@@ -949,7 +949,7 @@ emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg)
%st to %st(1), consider swapping them. */
if (REG_P (i2dest)
&& REGNO (i2dest) == FIRST_STACK_REG
- && (MEM_P (i2src) || GET_CODE (i2src) == CONST_DOUBLE)
+ && (MEM_P (i2src) || CONST_DOUBLE_P (i2src))
/* Ensure i2 doesn't have other side-effects. */
&& !side_effects_p (i2src)
/* And that the two instructions can actually be
--
2.21.0