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[PATCH 03/46] i386: Allow 64-bit vector modes in SSE registers
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Uros Bizjak <ubizjak at gmail dot com>
- Date: Fri, 1 Feb 2019 13:17:26 -0800
- Subject: [PATCH 03/46] i386: Allow 64-bit vector modes in SSE registers
- References: <20190201211809.963-1-hjl.tools@gmail.com>
In 64-bit mode, we can use SSE2 to support 64-bit vectors.
PR target/89021
* config/i386/i386.h (VALID_SSE_REG_MODE): Allow 64-bit vector
modes for TARGET_MMX_WITH_SSE.
(VALID_SSE2_REG_MODE): Likewise.
---
gcc/config/i386/i386.h | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index b62305fceec..10e882015f0 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -1155,7 +1155,11 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define VALID_SSE2_REG_MODE(MODE) \
((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode \
- || (MODE) == V2DImode || (MODE) == DFmode)
+ || (MODE) == V2DImode || (MODE) == DFmode \
+ || (TARGET_MMX_WITH_SSE && ((MODE) == V1DImode || (MODE) == V8QImode \
+ || (MODE) == V4HImode \
+ || (MODE) == V2SImode \
+ || (MODE) == V2SFmode)))
#define VALID_SSE_REG_MODE(MODE) \
((MODE) == V1TImode || (MODE) == TImode \
@@ -1198,7 +1202,11 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
|| (MODE) == V4DImode || (MODE) == V8SFmode || (MODE) == V4DFmode \
|| (MODE) == V2TImode || (MODE) == V8DImode || (MODE) == V64QImode \
|| (MODE) == V16SImode || (MODE) == V32HImode || (MODE) == V8DFmode \
- || (MODE) == V16SFmode)
+ || (MODE) == V16SFmode \
+ || (TARGET_MMX_WITH_SSE && ((MODE) == V1DImode || (MODE) == V8QImode \
+ || (MODE) == V4HImode \
+ || (MODE) == V2SImode \
+ || (MODE) == V2SFmode)))
#define X87_FLOAT_MODE_P(MODE) \
(TARGET_80387 && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode))
--
2.20.1