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Re: [PATCH] combine: Do not combine moves from hard registers
- From: Jeff Law <law at redhat dot com>
- To: Segher Boessenkool <segher at kernel dot crashing dot org>, Sam Tebbs <Sam dot Tebbs at arm dot com>
- Cc: Steve Ellcey <sellcey at cavium dot com>, Andreas Schwab <schwab at suse dot de>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, "bergner at linux dot ibm dot com" <bergner at linux dot ibm dot com>
- Date: Fri, 9 Nov 2018 14:12:22 -0700
- Subject: Re: [PATCH] combine: Do not combine moves from hard registers
- References: <mvmbm7jr5nm.fsf@suse.de> <1540571945.12895.67.camel@cavium.com> <20181026164805.GN5205@gate.crashing.org> <7bc8697f-a09e-627f-b032-eba5ecb682ac@arm.com> <20181108203418.GT5994@gate.crashing.org>
On 11/8/18 1:34 PM, Segher Boessenkool wrote:
> On Thu, Nov 08, 2018 at 03:44:44PM +0000, Sam Tebbs wrote:
>> Does your patch fix the incorrect generation of "scvtf s1, s1"? I was
>> looking at the issue as well and don't want to do any overlapping work.
>
> I don't know. Well, there are no incorrect code issues I know of at all
> now; but you mean that it is taking an instruction more than you would
> like to see, I suppose?
Which is ultimately similar to the 3 regressions HJ has reported on x86_64.
jeff