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Re: [PATCH] combine: Do not combine moves from hard registers
- From: Steve Ellcey <sellcey at cavium dot com>
- To: Andreas Schwab <schwab at suse dot de>, Segher Boessenkool <segher at kernel dot crashing dot org>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, "bergner at linux dot ibm dot com" <bergner at linux dot ibm dot com>
- Date: Fri, 26 Oct 2018 16:39:06 +0000
- Subject: Re: [PATCH] combine: Do not combine moves from hard registers
- References: <mvmbm7jr5nm.fsf@suse.de>
- Reply-to: <sellcey at cavium dot com>
What is the status of this patch? I see PR 87708, which is for the
regression to ira-shrinkwrap-prep-[12].c but what about all the
other regressions? I see 27 of them on my aarch64 build and when
I looked at one of them (gcc.target/aarch64/cvtf_1.c) the code looks
worse than before, generating an extra instruction in each of the
routines. Here is an example from one function where there is an
extra fmov that was not there before. The test runs at -O1 but
the extra instruction appears at all optimization levels. Should
I submit a new PR for this?
Steve Ellcey
void cvt_int32_t_to_float (int a, float b)
{ float c; c = (float) a;
if ( (c - b) > 0.00001) abort();
}
Which used to generate:
cvt_int32_t_to_float:
.LFB0:
.cfi_startproc
scvtf s1, w0
fsub s0, s1, s0
fcvt d0, s0
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fcmpe d0, d1
bgt .L9
ret
.L9:
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl abort
.cfi_endproc
Now generates:
cvt_int32_t_to_float:
.LFB0:
.cfi_startproc
fmov s1, w0
scvtf s1, s1
fsub s1, s1, s0
fcvt d1, s1
adrp x0, .LC0
ldr d0, [x0, #:lo12:.LC0]
fcmpe d1, d0
bgt .L9
ret
.L9:
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl abort
.cfi_endproc