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Re: [PATCH] Fix rtx_code_size static initialization order fiasco
- From: "Richard Earnshaw (lists)" <Richard dot Earnshaw at arm dot com>
- To: Ilya Leoshkevich <iii at linux dot ibm dot com>, gcc-patches at gcc dot gnu dot org
- Cc: krebbel at linux dot ibm dot com, rdapp at linux dot ibm dot com, rsandifo at gcc dot gnu dot org, rguenther at suse dot de
- Date: Thu, 25 Oct 2018 14:58:40 +0100
- Subject: Re: [PATCH] Fix rtx_code_size static initialization order fiasco
- References: <20181025132938.37913-1-iii@linux.ibm.com>
On 25/10/2018 14:29, Ilya Leoshkevich wrote:
> Bootstrapped and regtested on s390x-redhat-linux.
>
> r264556 and r264537 changed the format of EQ_ATTR_ALT RTXs to "ww",
> which also required adjusting rtx_code_size initializer. In order to
> simplify things, the list of rtx_codes known to use HOST_WIDE_INTs was
> replaced by the format string check. However, unlike the old one, this
> new check cannot be always performed at compile time, in which case a
> static constructor is generated. This may lead to a static
> initialization order fiasco with respect to other static constructors
> in the compiler, in case of PR87747, cselib's pool_allocator.
>
> gcc/ChangeLog:
>
> 2018-10-25 Ilya Leoshkevich <iii@linux.ibm.com>
>
> PR bootstrap/87747
> * rtl.c (RTX_CODE_HWINT_P_1): New helper macro.
> (RTX_CODE_HWINT_P): New macro.
> (rtx_code_size): Use RTX_CODE_HWINT_P ().
> ---
> gcc/rtl.c | 14 +++++++++++++-
> 1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/rtl.c b/gcc/rtl.c
> index ca5c25c422f..86a40b11cf4 100644
> --- a/gcc/rtl.c
> +++ b/gcc/rtl.c
> @@ -106,11 +106,23 @@ const enum rtx_class rtx_class[NUM_RTX_CODE] = {
> #undef DEF_RTL_EXPR
> };
>
> +/* Whether rtxs with the given code code store data in the hwint field. */
> +
> +#define RTX_CODE_HWINT_P_1(ENUM) \
> + ((ENUM) == CONST_INT || (ENUM) == CONST_DOUBLE \
> + || (ENUM) == CONST_FIXED || (ENUM) == CONST_WIDE_INT)
> +#ifdef GENERATOR_FILE
> +#define RTX_CODE_HWINT_P(ENUM) \
> + (RTX_CODE_HWINT_P_1 (ENUM) || (ENUM) == EQ_ATTR_ALT)
> +#else
> +#define RTX_CODE_HWINT_P RTX_CODE_HWINT_P_1
> +#endif
> +
> /* Indexed by rtx code, gives the size of the rtx in bytes. */
>
> const unsigned char rtx_code_size[NUM_RTX_CODE] = {
> #define DEF_RTL_EXPR(ENUM, NAME, FORMAT, CLASS) \
> - ((FORMAT)[0] == 'w' \
> + (RTX_CODE_HWINT_P (ENUM) \
> ? RTX_HDR_SIZE + (sizeof FORMAT - 1) * sizeof (HOST_WIDE_INT) \
> : (ENUM) == REG \
> ? RTX_HDR_SIZE + sizeof (reg_info) \
>
I can confirm that with this patch we now get past the previous point of
failure on the affected machine. Thanks for turning this around so quickly.
R.