This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH][GCC][AARCH64] Add even-pair register classes
- From: Matthew Malcomson <matthew dot malcomson at arm dot com>
- To: Wilco Dijkstra <Wilco dot Dijkstra at arm dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>
- Cc: nd <nd at arm dot com>, Richard Henderson <richard dot henderson at linaro dot org>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>, James Greenhalgh <James dot Greenhalgh at arm dot com>
- Date: Fri, 28 Sep 2018 14:58:42 +0100
- Subject: Re: [PATCH][GCC][AARCH64] Add even-pair register classes
- References: <DB5PR08MB10300791FF2733763EC9EF2D83EC0@DB5PR08MB1030.eurprd08.prod.outlook.com>
Hi Wilko,
On 28/09/18 13:33, Wilco Dijkstra wrote:
Matthew wrote:
The canonical way to require even-odd pairs of registers to implement a TImode
pseudo register as mentioned in the documentation is to limit *all* TImode
registers to being even-odd by using the TARGET_HARD_REGNO_MODE_OK hook.
And that is the best approach for cases like this. Adding new register classes is rarely
a good idea since they complicate matters and slow down the register allocator. We've
had several cases where a new register class caused unexpected code quality issues.
How do we know that won't happen this time?
I didn't know that a new register class could often cause code quality
issues
and slower compilation, I guess this is only when the corresponding
constraint
is being used?
Or can it affect other patterns?
We don't want to use this method as it would apply to all register pairs.
Why not? From our Arm/Thumb-2 experiments on DImode splitting and allocation we
know even/odd pairs give a better allocation, and there are fewer cases where the
allocation completely fails under high register pressure.
Do the Arm/Thumb-2 experiments you mention imply that it would be better to
force TImode to be put in even/odd pairs anyway, or would the ira allocation
preference already provide enough incentive?
I guess this would be influenced by DImode being used quite often in
Arm/Thumb-2?
(It is noteworthy that the current cost model in ira prefers to put values that
span two registers in an even-odd pair anyway, so the use of
TARGET_HARD_REGNO_MODE_OK would likely not cause much change in low register
pressure situations)
Exactly. TImode is not used that much (unlike DImode on Arm/Thumb-2), so it would
be hard to find any difference.
So I would strongly suggest to keep things simple and just use even/odd pairs. Adding a
new register class is generally not worth it unless you can show it will significantly improve
code quality.
Wilco
Can I clarify whether you're saying "limiting all register pairs to even/odd
might overall be more beneficial than just limiting specific patterns"
or "there
probably won't be much difference between the two, and introducing a new
register class isn't worth the complexity"?
I initially thought you meant the second statement (because that was
something
that I wondered about already), but am not certain.
Thanks,
M