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Re: RFC: Patch to implement Aarch64 SIMD ABI
Steve Ellcey wrote:
> OK, I think I understand this a bit better now. I think my main
> problem is with the term 'writeback' which I am not used to seeing.
> But if I understand things correctly we are saving one or two registers
> and (possibly) updating the stack pointer using auto-increment/auto-
> decrement in one instruction and that the updating of SP is what you
> mean by 'writeback'. Correct?
Correct. The term has been in use since the very first Arm CPUs, where
load/stores have a writeback bit to control whether the base register is updated.
Note that we don't limit the instructions to simple push/pops: SP is updated
by the frame size rather than by the transfer size.