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[Patch, avr, PR85624] - Fix ICE when initializing 128-byte aligned array


The below patch fixes an ICE for the avr target when the setmemhi
expander is involved.

The setmemhi expander generated RTL ends up as an unrecognized insn
if the alignment of the destination exceeds that of a QI
mode const_int (127), AND the number of bytes to set fits in a QI
mode const_int. The second condition prevents *clrmemhi from matching,
and *clrmemqi does not match because it expects operand 3 (the alignment
const_int rtx) to be QI mode, and a value of 128 or greater does not fit.
The patch fixes this by changing the *clrmemqi pattern to match a HI
mode const_int, and also adds a testcase.

Regression test showed no new failures, ok to commit to trunk?


2018-07-18  Senthil Kumar Selvaraj  <>
    PR target/85624
    * config/avr/ (*clrmemqi): Change mode of operands[2]
    from QI to HI.
2018-07-18  Senthil Kumar Selvaraj  <>
    PR target/85624
    * New test.

diff --git gcc/config/avr/ gcc/config/avr/
index e619e695418..644e3cfabc5 100644
--- gcc/config/avr/
+++ gcc/config/avr/
@@ -1095,7 +1095,7 @@
   [(set (mem:BLK (match_operand:HI 0 "register_operand" "e"))
         (const_int 0))
    (use (match_operand:QI 1 "register_operand" "r"))
-   (use (match_operand:QI 2 "const_int_operand" "n"))
+   (use (match_operand:HI 2 "const_int_operand" "n"))
    (clobber (match_scratch:HI 3 "=0"))
    (clobber (match_scratch:QI 4 "=&1"))]
diff --git gcc/testsuite/ gcc/testsuite/
new file mode 100644
index 00000000000..ede2e80216a
--- /dev/null
+++ gcc/testsuite/
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+/* This testcase exposes PR85624. An alignment directive with
+   a value greater than 127 on an array with dimensions that fit
+   QImode causes an 'unrecognizable insn' ICE. Turns out clrmemqi
+   did not match the pattern expanded by setmemhi, because it
+   assumed the alignment val will fit in a QI. */
+int foo() {
+  volatile int arr[3] __attribute__((aligned(128))) = {0};
+  return arr[2];

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