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[AArch64][PATCH 0/2] Improve codegen for AES instructions
- From: Andre Simoes Dias Vieira <Andre dot SimoesDiasVieira at arm dot com>
- To: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Cc: nd <nd at arm dot com>, James Greenhalgh <James dot Greenhalgh at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>, Marcus Shawcroft <Marcus dot Shawcroft at arm dot com>
- Date: Mon, 18 Jun 2018 09:37:48 +0000
- Subject: [AArch64][PATCH 0/2] Improve codegen for AES instructions
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Hi,
This patch series aims to improve codegen for the AArch64 AES instructions by doing two things.
The first is to make the AES unspecs commutative and by consequence make the corresponding intrinsics commutative, since the instructions themselves are commutative in the input.
This will improve register allocation around these instructions. The second step is to combine AES instructions with the following format 'AES (XOR (a,b), 0)' into 'AES (a, b)'.
Andre Vieira (2):
Make AES unspecs commutative
Combine AES instructions with xor and zero operands
Cheers,
Andre