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RE: Prefer open-coding vector integer division
- From: "Matthew Fortune" <mfortune at gmail dot com>
- To: "'Richard Sandiford'" <richard dot sandiford at linaro dot org>, <gcc-patches at gcc dot gnu dot org>
- Date: Fri, 8 Jun 2018 14:36:28 +0100
- Subject: RE: Prefer open-coding vector integer division
- References: <87h8mxea5s.fsf@linaro.org>
Richard Sandiford <richard.sandiford@linaro.org> writes:
> vect_recog_divmod_pattern currently bails out if the target has
> native support for integer division, but I think in practice
> it's always going to be better to open-code it anyway, just as
> we usually open-code scalar divisions by constants.
>
> I think the only currently affected target is MIPS MSA, where for:
>
> void
> foo (int *x)
> {
> for (int i = 0; i < 100; ++i)
> x[i] /= 2;
> }
>
> we previously preferred to use division for powers of 2:
>
> .set noreorder
> bnz.w $w1,1f
> div_s.w $w0,$w0,$w1
> break 7
> .set reorder
> 1:
>
> (or just the div_s.w for -mno-check-zero-division), but after the patch
> we open-code them using shifts:
>
> clt_s.w $w1,$w0,$w2
> subv.w $w0,$w0,$w1
> srai.w $w0,$w0,1
>
> I assume that's better. Matthew, is that right?
Sorry for extreme tardiness. Yes, the alternate sequence has a max latency
of 6. Although I don't have the range of latencies to hand for the FDIV, as
far as I remember 6 cycles is better than the fastest FDIV case at least for
i6400/i6500.
Matthew