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[RFC Patch], PowerPC memory support pre-gcc9, patch #1


I am starting to work on cleaning up the memory addressing support in the GCC 9
time frame.  At the moment, I am working on upgrading the infrastructure to
allow in the future to prevent splitting memory on 64-bit LE systems too early,
rework the fusion support, and provide a pathway for future processor support.

The first patch in the series moves most of the reg_addr structure from
rs6000.c to rs6000-protos.h, so that in the next patch, we can start splitting
some of the address code to other files.

In addition to just moving the reg_addr stuff to be global, there are a few
minor changes in this patch:

    1)	I was playing with making r12 be fixed with a new option (not in this
	set of patches), and I noticed it wasn't reflected in the -mdebug=reg
	debug dump, due to the debug dump being done before the conditional
	registers are setup.  I made the debug dump set conditional registers.

    2)	I renamed some of the mode_suppports helper functions to be more
	consistent the instruction documentation (i.e. there are helper
	functions for normal d-form register+offset instructions, ds-form where
	the bottom 2 bits must be 0 and dq-form where the bottom 4 bits must be
	0).  I added optional arguments to the helper functions, so that
	secondary reload in the future can narrow down whether a particular
	register class has particular support.

    3)	I did a simplification in setting up the reg_addr address masks, where
	instead of 3 states which two set INDEXED and the other sets MULTIPLE
	register, it only has 1 place where it sets INDEXED.

I have tested this with full bootstrap and make check on a little endian power8
with no regressions.  Since we are in stage4 currently, I am not asking for
permission to check it in, but if you have any comments on how you would like
to see the eventual patches when stage1 opens up, let me know.  It would be
simpler to make the changes now, rather than when the number of patches have
accumulated.

The second patch that I will submit shortly will move the
rs6000_output_move_128bit function to a new file (rs6000-output.c).

The third patch that I will submit will be to move the movdi patterns to a
separate function (rs6000_output_move_64bit) also in rs6000-output.c, so that
in the future we can use C++ code to check on constraints, etc.

I haven't written it yet, but the fourth patch is likely to similarly move DF
and DD output templates to use the same function.  One thing I plan to do for
DF/DD is to structure the comments about the alternatives so that it is more
readable, much like I've done for movdi, etc.

I likely will remove the undocumented toc-fusion all together, and eventually
rework the p8/p9 fusion support.

2018-03-14  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000-protos.h (regno_or_subregno): Add
	declaration.
	(enum rs6000_reg_type): Move the basic reg_addr support from
	rs6000.c to rs6000-protos.h, except for the parts that store
	insn_code's for the register allocator to allow future patches to
	move parts of rs6000.c to other files.  Change the bool flags to
	bit-fields.  Add a flag to indicate the mode/reload register class
	uses DS-form (14-bit offset) addresses.
	(reg_class_to_reg_type): Likwise.
	(IS_STD_REG_TYPE): Likwise.
	(IS_FP_VECT_REG_TYPE): Likwise.
	(enum rs6000_reload_reg_type): Likwise.
	(struct rs6000_reg_addr): Likwise.
	(reg_addr): Likwise.
	(RELOAD_REG_*): Likewise.
	(mode_supports_pre_incdec_p): Move the mode supports helper
	functions to rs6000-protos.h.  Add an optional argument to use a
	particular reload register class instead of RELOAD_REG_ANY.
	Rename mode_supports_vsx_dform_quad -> mode_supports_dq_form.  Add
	mode_supports_ds_form for DS-form addresses.  Add
	mode_supports_x_form for X-form (indexed) addresses.
	(mode_supports_pre_modify_p): Likewise.
	(mode_supports_d_form): Likewise.
	(mode_supports_ds_form): Likewise.
	(mode_supports_dq_form): Likewise.
	(mode_supports_x_form): Likewise.
	* config/rs6000/rs6000.c (enum rs6000_reg_type): Move basic
	reg_addr support to rs6000-protos.h.
	(IS_STD_REG_TYPE): Likewise.
	(IS_FP_VECT_REG_TYPE): Likewise.
	(enum rs6000_reload_reg_typ): Likewise.
	(reg_class_to_reg_type): Make global.
	(addr_mask_type): Move basic reg_addr support to rs6000-protos.h.
	(reg_addr): Make global.
	(RELOAD_REG_VALID): Move basic reg_addr support to
	rs6000-protos.h.
	(RELOAD_REG_*): Likewise.
	(struct rs6000_insn_functions): New structure that includes the
	parts of the old reg_addr structure that did not move to
	rs6000-protos.h because it contains insn codes.
	(rs6000_insns): Likewise.
	(mode_supports_pre_modify_p): Move to rs6000-protos.h.
	(mode_supports_pre_modify_p): Likewise.
	(mode_supports_vmx_dform): Likewise.
	(mode_supports_vsx_dform_quad): Likewise.
	(rs6000_conditional_register_usage): Add forward declaration.
	(rs6000_debug_addr_mask): Print whether the mode/reload register
	class uses DS-form memory instructions.
	(rs6000_debug_print_mode): Call rs6000_conditional_register_usage
	in order to print the status of the registers properly.  Use
	rs6000_insns instead of reg_addr for the insn code elements.
	(rs6000_setup_reg_addr_masks): Simplify the code to set whether a
	mode uses multiple registers or provides indexed mode.  Don't
	allow update addresses on modes that only support indexed mode.
	Note that DI/SI in 64-bit use DS-form addresses as well as ISA 3.0
	scalar altivec offset references.
	(rs6000_init_hard_regno_mode_ok): Clear rs6000_insns.  Change to
	use rs6000_insns instead of reg_addr for saving the insn codes for
	secondary reload and fusion support.
	(regno_or_subregno): Make global.
	(quad_address_p): Rename mode_supports_vsx_dform_quad to
	mode_supports_dq_form.
	(reg_offset_addressing_ok_p): Likewise.
	(offsettable_ok_by_alignment): Likewise.
	(rs6000_legitimate_offset_address_p): Likewise.
	(legitimate_lo_sum_address_p): Likewise.
	(rs6000_legitimize_address): Likewise.
	(rs6000_legitimize_reload_address): Likewise.
	(rs6000_legitimate_address_p): Likewise.
	(rs6000_secondary_reload_direct_move): Use rs6000_insns to pick up
	secondary reload and fusion insn codes instead of reg_addr.
	(rs6000_secondary_reload): Likewise.
	(rs6000_secondary_reload_inner): Rename
	mode_supports_vsx_dform_quad to mode_supports_dq_form.  Use
	mode_supports_d_form with RELOAD_REG_VMX instead of calling
	mode_supports_vmx_dform.
	(rs6000_preferred_reload_class): Likewise.
	(rs6000_secondary_reload_class): Likewise.
	(rs6000_output_move_128bit): Likewise.


-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797

Attachment: ext-addr.patch01b
Description: Text document


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