[Patch][Aarch64][PR target/79924] Cannot translate diagnostics

[Steve Ellcey <sellcey at cavium dot com>]

This is a patch for PR target/79924, which says the error messages
called from aarch64_err_no_fpadvsimd cannot be translated due to
how they are constructed.  To make them translatable and not change
the actual messages would have required creating 16 individual messages
which seemed a bit excessive so I simplified them a bit and fixed
up the test cases that scan for them.

Instead of having 16 messages with:

['-mgeneral-regs-only'|'+nofp' feature modifier] is incompatible with [vector|floating-point] [argument|return type|varargs|code]

I changed it to four messages with

[-mgeneral-regs-only|+nofp feature modifier] is incompatible with the use of [vector|floating point] types

The changes I made in the actual messages were:

Remove the quotes from around '-mgeneral-regs-only' and '+nofp' because error
messages I saw on other platforms did not use quotes around compiler flags.

Replace the specific [argument|return type|varargs|code] terms with
'use of [vector|floating point] types.  This got me from 16 to 4
messages.  I think that since the error message will point at the actual
line where the problem is, having the message be a bit more generic is
not a problem.  Also I chose to include 'the use of' because having these
types (and not doing anything with them) will not trigger one of these
errors only using them in code (as an argument, return type, etc) will
trigger the error.  Also I got rid of the '-' in floating-point since
I didn't see any reason for it to be there.

Tested with no regressions, OK to checkin?

Steve Ellcey
sellcey@cavium.com


2018-01-11  Steve Ellcey  <sellcey@cavium.com>

	PR target/79924
	* config/aarch64/aarch64-protos.h (aarch64_err_no_fpadvsimd): Remove
	second argument.
	* config/aarch64/aarch64-protos..c (aarch64_err_no_fpadvsimd):
	Remove second argument, change how error is called.
	(aarch64_layout_arg): Remove second argument from
	aarch64_err_no_fpadvsimd call.
	(aarch64_init_cumulative_args): Ditto.
	(aarch64_gimplify_va_arg_expr): Ditto.
	* config/aarch64/aarch64.md (mov<mode>): Ditto.


2018-01-11  Steve Ellcey  <sellcey@cavium.com>

	PR target/79924
	* gcc.target/aarch64/mgeneral-regs_1.c: Update error message.
	* gcc.target/aarch64/mgeneral-regs_2.c: Ditto.
	* gcc.target/aarch64/mgeneral-regs_3.c: Ditto.
	* gcc.target/aarch64/nofp_1.c: Ditto.

diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index 8c3471b..39f9400 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -412,7 +412,7 @@ void aarch64_asm_output_labelref (FILE *, const char *);
 void aarch64_cpu_cpp_builtins (cpp_reader *);
 const char * aarch64_gen_far_branch (rtx *, int, const char *, const char *);
 const char * aarch64_output_probe_stack_range (rtx, rtx);
-void aarch64_err_no_fpadvsimd (machine_mode, const char *);
+void aarch64_err_no_fpadvsimd (machine_mode);
 void aarch64_expand_epilogue (bool);
 void aarch64_expand_mov_immediate (rtx, rtx);
 void aarch64_expand_prologue (void);
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index ae44c2a..39cc9ba 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1029,13 +1029,18 @@ aarch64_gen_far_branch (rtx * operands, int pos_label, const char * dest,
 }
 
 void
-aarch64_err_no_fpadvsimd (machine_mode mode, const char *msg)
+aarch64_err_no_fpadvsimd (machine_mode mode)
 {
-  const char *mc = FLOAT_MODE_P (mode) ? "floating-point" : "vector";
   if (TARGET_GENERAL_REGS_ONLY)
-    error ("%qs is incompatible with %s %s", "-mgeneral-regs-only", mc, msg);
+    if (FLOAT_MODE_P (mode))
+      error ("-mgeneral-regs-only is incompatible with the use of floating point types");
+    else
+      error ("-mgeneral-regs-only is incompatible with the use of vector types");
   else
-    error ("%qs feature modifier is incompatible with %s %s", "+nofp", mc, msg);
+    if (FLOAT_MODE_P (mode))
+      error ("+nofp feature modifier is incompatible with the use of floating point types");
+    else
+      error ("+nofp feature modifier is incompatible with the use of vector types");
 }
 
 /* Implement TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS.
@@ -2526,7 +2531,7 @@ aarch64_layout_arg (cumulative_args_t pcum_v, machine_mode mode,
   if (allocate_nvrn)
     {
       if (!TARGET_FLOAT)
-	aarch64_err_no_fpadvsimd (mode, "argument");
+	aarch64_err_no_fpadvsimd (mode);
 
       if (nvrn + nregs <= NUM_FP_ARG_REGS)
 	{
@@ -2668,7 +2673,7 @@ aarch64_init_cumulative_args (CUMULATIVE_ARGS *pcum,
       int nregs ATTRIBUTE_UNUSED; /* Likewise.  */
       if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (type), type,
 						   &mode, &nregs, NULL))
-	aarch64_err_no_fpadvsimd (TYPE_MODE (type), "return type");
+	aarch64_err_no_fpadvsimd (TYPE_MODE (type));
     }
   return;
 }
@@ -10774,7 +10779,7 @@ aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
 
       /* TYPE passed in fp/simd registers.  */
       if (!TARGET_FLOAT)
-	aarch64_err_no_fpadvsimd (mode, "varargs");
+	aarch64_err_no_fpadvsimd (mode);
 
       f_top = build3 (COMPONENT_REF, TREE_TYPE (f_vrtop),
 		      unshare_expr (valist), f_vrtop, NULL_TREE);
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 854c448..57afadc 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1066,7 +1066,7 @@
   {
     if (!TARGET_FLOAT)
       {
-	aarch64_err_no_fpadvsimd (<MODE>mode, "code");
+	aarch64_err_no_fpadvsimd (<MODE>mode);
 	FAIL;
       }
 

diff --git a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c
index 1656db5..9484c8a 100644
--- a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c
@@ -2,8 +2,7 @@
 
 typedef int int32x2_t __attribute__ ((__vector_size__ ((8))));
 
-/* { dg-error "'-mgeneral-regs-only' is incompatible with vector return type" "" {target "aarch64*-*-*"} .+2 } */
-/* { dg-error "'-mgeneral-regs-only' is incompatible with vector argument" "" {target "aarch64*-*-*"} .+1 } */
+/* { dg-error "-mgeneral-regs-only is incompatible with the use of vector types" "" {target "aarch64*-*-*"} .+1 } */
 int32x2_t test (int32x2_t a, int32x2_t b)
 {
   return a + b;
diff --git a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_2.c b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_2.c
index 8590199..34b4d97 100644
--- a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_2.c
@@ -10,6 +10,6 @@ test (int i, ...)
   va_list argp;
   va_start (argp, i);
   int32x2_t x = (int32x2_t) {0, 1};
-  x += va_arg (argp, int32x2_t); /* { dg-error "'-mgeneral-regs-only' is incompatible with vector varargs" } */
+  x += va_arg (argp, int32x2_t); /* { dg-error "-mgeneral-regs-only is incompatible with the use of vector types" } */
   return x[0] + x[1];
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_3.c b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_3.c
index f6b5fba..84320fe 100644
--- a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_3.c
@@ -5,7 +5,7 @@ extern void abort (void);
 int
 test (int i, ...)
 {
-  float f = (float) i; /* { dg-error "'-mgeneral-regs-only' is incompatible with floating-point code" } */
+  float f = (float) i; /* { dg-error "-mgeneral-regs-only is incompatible with the use of floating point types" } */
   if (f != f) abort ();
   return 2;
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/nofp_1.c b/gcc/testsuite/gcc.target/aarch64/nofp_1.c
index 3fc0036..c176c19 100644
--- a/gcc/testsuite/gcc.target/aarch64/nofp_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/nofp_1.c
@@ -15,5 +15,5 @@ main (int argc, char **argv)
 {
   int32x2_t a = (int32x2_t) {0, 1};
   int32x2_t b = (int32x2_t) {2, 3};
-  return test (2, a, b); /* { dg-error "'\\+nofp' feature modifier is incompatible with vector argument" } */
+  return test (2, a, b); /* { dg-error "\\+nofp feature modifier is incompatible with the use of vector types" } */
 }