[PATCH 1/2] Eliminate -mno-lra from the rs6000 port.

[Peter Bergner <bergner at vnet dot ibm dot com>]

This patch makes the -mlra option a nop while disallowing -mno-lra.
It also removes the target bit mask and its usage.
Finally, this patch updates the testsuite by removing all usage of
the -mlra and -mno-lra options.

This passed bootstrap and regtesting with no regressions, ok for trunk?

Peter


gcc/

	* config/rs6000/rs6000.opt (mlra): Replace with stub.
	* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Delete OPTION_MASK_LRA.
	* config/rs6000/rs6000.c (TARGET_LRA_P): Delete.
	(rs6000_debug_reg_global): Delete print of LRA status.
	(rs6000_option_override_internal): Delete dead LRA related code.
	(rs6000_lra_p): Delete function.
	* doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mlra.

gcc/testsuite/

	* g++.dg/pr69667.C: Remove option -mlra.
	* gcc.target/powerpc/dform-1.c: Likewise.
	* gcc.target/powerpc/dform-2.c: Likewise.
	* gcc.target/powerpc/dform-3.c: Likewise.
	* gcc.target/powerpc/p8vector-int128-1.c: Likewise.
	* gcc.target/powerpc/p9-vparity.c: Likewise.
	* gcc.target/powerpc/pr63491.c: Likewise.
	* gcc.target/powerpc/pr67808.c: Likewise.
	* gcc.target/powerpc/pr68805.c: Likewise.
	* gcc.target/powerpc/pr69461.c: Likewise.
	* gcc.target/powerpc/pr71680.c: Likewise.
	* gcc.target/powerpc/pr77289.c: Likewise.
	* gcc.target/powerpc/pr78458.c: Likewise.
	* gcc.target/powerpc/pr78543.c: Likewise.
	* g++.dg/pr71294.C: Remove option -mno-lra.
	* gcc.target/powerpc/pr71656-1.c: Likewise.
	* gcc.target/powerpc/pr71656-2.c: Likewise.
	* gcc.target/powerpc/pr71698.c: Likewise.

Index: gcc/config/rs6000/rs6000.opt
===================================================================
--- gcc/config/rs6000/rs6000.opt	(revision 250587)
+++ gcc/config/rs6000/rs6000.opt	(working copy)
@@ -430,9 +430,9 @@ mlong-double-
 Target RejectNegative Joined UInteger Var(rs6000_long_double_type_size) Save
 -mlong-double-<n>	Specify size of long double (64 or 128 bits).
 
+; This option existed in the past, but now is always on.
 mlra
-Target Report Mask(LRA) Var(rs6000_isa_flags)
-Enable Local Register Allocation.
+Target RejectNegative Undocumented Ignore
 
 msched-costly-dep=
 Target RejectNegative Joined Var(rs6000_sched_costly_dep_str)
Index: gcc/config/rs6000/rs6000-cpus.def
===================================================================
--- gcc/config/rs6000/rs6000-cpus.def	(revision 250587)
+++ gcc/config/rs6000/rs6000-cpus.def	(working copy)
@@ -126,7 +126,6 @@
 				 | OPTION_MASK_FPRND			\
 				 | OPTION_MASK_HTM			\
 				 | OPTION_MASK_ISEL			\
-				 | OPTION_MASK_LRA			\
 				 | OPTION_MASK_MFCRF			\
 				 | OPTION_MASK_MFPGPR			\
 				 | OPTION_MASK_MODULO			\
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	(revision 250587)
+++ gcc/config/rs6000/rs6000.c	(working copy)
@@ -1887,9 +1887,6 @@ static const struct attribute_spec rs600
 #undef TARGET_MODE_DEPENDENT_ADDRESS_P
 #define TARGET_MODE_DEPENDENT_ADDRESS_P rs6000_mode_dependent_address_p
 
-#undef TARGET_LRA_P
-#define TARGET_LRA_P rs6000_lra_p
-
 #undef TARGET_COMPUTE_PRESSURE_CLASSES
 #define TARGET_COMPUTE_PRESSURE_CLASSES rs6000_compute_pressure_classes
 
@@ -2793,8 +2790,6 @@ rs6000_debug_reg_global (void)
   if (TARGET_LINK_STACK)
     fprintf (stderr, DEBUG_FMT_S, "link_stack", "true");
 
-  fprintf (stderr, DEBUG_FMT_S, "lra", TARGET_LRA ? "true" : "false");
-
   if (TARGET_P8_FUSION)
     {
       char options[80];
@@ -4562,35 +4557,10 @@ rs6000_option_override_internal (bool gl
 	}
     }
 
-  /* Enable LRA by default.  */
-  if ((rs6000_isa_flags_explicit & OPTION_MASK_LRA) == 0)
-    rs6000_isa_flags |= OPTION_MASK_LRA;
-
-  /* There have been bugs with -mvsx-timode that don't show up with -mlra,
-     but do show up with -mno-lra.  Given -mlra will become the default once
-     PR 69847 is fixed, turn off the options with problems by default if
-     -mno-lra was used, and warn if the user explicitly asked for the option.
-
-     Enable -mpower9-dform-vector by default if LRA and other power9 options.
-     Enable -mvsx-timode by default if LRA and VSX.  */
-  if (!TARGET_LRA)
-    {
-      if (TARGET_VSX_TIMODE)
-	{
-	  if ((rs6000_isa_flags_explicit & OPTION_MASK_VSX_TIMODE) != 0)
-	    warning (0, "-mvsx-timode might need -mlra");
-
-	  else
-	    rs6000_isa_flags &= ~OPTION_MASK_VSX_TIMODE;
-	}
-    }
-
-  else
-    {
-      if (TARGET_VSX && !TARGET_VSX_TIMODE
-	  && (rs6000_isa_flags_explicit & OPTION_MASK_VSX_TIMODE) == 0)
-	rs6000_isa_flags |= OPTION_MASK_VSX_TIMODE;
-    }
+  /* Enable -mvsx-timode by default if VSX.  */
+  if (TARGET_VSX && !TARGET_VSX_TIMODE
+      && (rs6000_isa_flags_explicit & OPTION_MASK_VSX_TIMODE) == 0)
+    rs6000_isa_flags |= OPTION_MASK_VSX_TIMODE;
 
   /* Set -mallow-movmisalign to explicitly on if we have full ISA 2.07
      support. If we only have ISA 2.06 support, and the user did not specify
@@ -35895,14 +35865,6 @@ rs6000_libcall_value (machine_mode mode)
   return gen_rtx_REG (mode, regno);
 }
 
-
-/* Return true if we use LRA instead of reload pass.  */
-static bool
-rs6000_lra_p (void)
-{
-  return TARGET_LRA;
-}
-
 /* Compute register pressure classes.  We implement the target hook to avoid
    IRA picking something like NON_SPECIAL_REGS as a pressure class, which can
    lead to incorrect estimates of number of available registers and therefor
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi	(revision 250587)
+++ gcc/doc/invoke.texi	(working copy)
@@ -1048,8 +1048,7 @@ See RS/6000 and PowerPC Options.
 -mfloat128  -mno-float128  -mfloat128-hardware  -mno-float128-hardware @gol
 -mgnu-attribute  -mno-gnu-attribute @gol
 -mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{reg} @gol
--mstack-protector-guard-offset=@var{offset} @gol
--mlra  -mno-lra}
+-mstack-protector-guard-offset=@var{offset}}
 
 @emph{RX Options}
 @gccoptlist{-m64bit-doubles  -m32bit-doubles  -fpu  -nofpu@gol
@@ -21841,11 +21840,6 @@ This switch enables or disables the gene
 This switch has been deprecated.  Use @option{-misel} and
 @option{-mno-isel} instead.
 
-@item -mlra
-@opindex mlra
-Enable Local Register Allocation. By default the port uses LRA.
-(i.e. @option{-mno-lra}).
-
 @item -mspe
 @itemx -mno-spe
 @opindex mspe
Index: gcc/testsuite/g++.dg/pr69667.C
===================================================================
--- gcc/testsuite/g++.dg/pr69667.C	(revision 250587)
+++ gcc/testsuite/g++.dg/pr69667.C	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
-/* { dg-options "-mcpu=power8 -w -std=c++14 -mlra" } */
+/* { dg-options "-mcpu=power8 -w -std=c++14" } */
 
 /* target/69667, compiler got
    internal compiler error: Max. number of generated reload insns per insn is achieved (90)  */
Index: gcc/testsuite/g++.dg/pr71294.C
===================================================================
--- gcc/testsuite/g++.dg/pr71294.C	(revision 250587)
+++ gcc/testsuite/g++.dg/pr71294.C	(working copy)
@@ -1,7 +1,7 @@
 // { dg-do compile { target { powerpc64*-*-* && lp64 } } }
 // { dg-require-effective-target powerpc_p8vector_ok } */
 // { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } }
-// { dg-options "-mcpu=power8 -O3 -fstack-protector -mno-lra" }
+// { dg-options "-mcpu=power8 -O3 -fstack-protector" }
 
 // PAR target/71294 failed because RELOAD could not figure how create a V2DI
 // vector that auto vectorization created with each element being the same
Index: gcc/testsuite/gcc.target/powerpc/dform-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/dform-1.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/dform-1.c	(working copy)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-mcpu=power9 -mpower9-dform -O2 -mlra" } */
+/* { dg-options "-mcpu=power9 -mpower9-dform -O2" } */
 
 #ifndef TYPE
 #define TYPE double
Index: gcc/testsuite/gcc.target/powerpc/dform-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/dform-2.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/dform-2.c	(working copy)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-mcpu=power9 -mpower9-dform -O2 -mlra" } */
+/* { dg-options "-mcpu=power9 -mpower9-dform -O2" } */
 
 #ifndef TYPE
 #define TYPE float
Index: gcc/testsuite/gcc.target/powerpc/dform-3.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/dform-3.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/dform-3.c	(working copy)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-mcpu=power9 -mpower9-dform -O2 -mlra" } */
+/* { dg-options "-mcpu=power9 -mpower9-dform -O2" } */
 
 #ifndef TYPE
 #define TYPE vector double
Index: gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
-/* { dg-options "-mcpu=power8 -O3 -mvsx-timode -mlra" } */
+/* { dg-options "-mcpu=power8 -O3 -mvsx-timode" } */
 
 #include <altivec.h>
 
Index: gcc/testsuite/gcc.target/powerpc/p9-vparity.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/p9-vparity.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/p9-vparity.c	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-mcpu=power9 -O2 -mlra -mvsx-timode" } */
+/* { dg-options "-mcpu=power9 -O2 -mvsx-timode" } */
 
 #include <altivec.h>
 
Index: gcc/testsuite/gcc.target/powerpc/pr63491.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr63491.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr63491.c	(working copy)
@@ -1,5 +1,5 @@
 /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
-/* { dg-options "-O1 -mcpu=power8 -mlra" } */
+/* { dg-options "-O1 -mcpu=power8" } */
 
 typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t;
 typedef unsigned long long scalar_64_t;
Index: gcc/testsuite/gcc.target/powerpc/pr67808.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr67808.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr67808.c	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
-/* { dg-options "-O1 -mvsx -mlra -mcpu=power7 -mlong-double-128" } */
+/* { dg-options "-O1 -mvsx -mcpu=power7 -mlong-double-128" } */
 
 /* PR 67808: LRA ICEs on simple double to long double conversion test case */
 
Index: gcc/testsuite/gcc.target/powerpc/pr68805.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr68805.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr68805.c	(working copy)
@@ -1,6 +1,6 @@
 /* { dg-do compile { target powerpc64le-*-* } } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
-/* { dg-options "-O2 -mvsx-timode -mcpu=power8 -mlra" } */
+/* { dg-options "-O2 -mvsx-timode -mcpu=power8" } */
 
 typedef struct bar {
   void *a;
Index: gcc/testsuite/gcc.target/powerpc/pr69461.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr69461.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr69461.c	(working copy)
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O3 -mlra" } */
+/* { dg-options "-O3" } */
 
 extern void _setjmp (void);
 typedef struct {
Index: gcc/testsuite/gcc.target/powerpc/pr71656-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr71656-1.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr71656-1.c	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-O1 -mcpu=power9 -mpower9-dform-vector -mno-lra" } */
+/* { dg-options "-O1 -mcpu=power9 -mpower9-dform-vector" } */
 
 typedef __attribute__((altivec(vector__))) int type_t;
 type_t
Index: gcc/testsuite/gcc.target/powerpc/pr71656-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr71656-2.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr71656-2.c	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-O3 -mcpu=power9 -mpower9-dform-vector -mno-lra -funroll-loops -fno-aggressive-loop-optimizations" } */
+/* { dg-options "-O3 -mcpu=power9 -mpower9-dform-vector -funroll-loops -fno-aggressive-loop-optimizations" } */
 
 typedef double vec[3];
 struct vec_t
Index: gcc/testsuite/gcc.target/powerpc/pr71680.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr71680.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr71680.c	(working copy)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
-/* { dg-options "-mcpu=power8 -O1 -mlra" } */
+/* { dg-options "-mcpu=power8 -O1" } */
 
 #pragma pack(1)
 struct
Index: gcc/testsuite/gcc.target/powerpc/pr71698.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr71698.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr71698.c	(working copy)
@@ -3,7 +3,7 @@
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-require-effective-target dfp } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-O1 -mcpu=power9 -mno-lra" } */
+/* { dg-options "-O1 -mcpu=power9" } */
 
 extern void testvad128 (int n, ...);
 void
Index: gcc/testsuite/gcc.target/powerpc/pr77289.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr77289.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr77289.c	(working copy)
@@ -2,7 +2,7 @@
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
-/* { dg-options "-O3 -mcpu=power7 -funroll-loops -ffast-math -mlra -mupdate -fno-auto-inc-dec" } */
+/* { dg-options "-O3 -mcpu=power7 -funroll-loops -ffast-math -mupdate -fno-auto-inc-dec" } */
 
 /* PR 77289: LRA ICEs due to invalid constraint checking.  */
 
Index: gcc/testsuite/gcc.target/powerpc/pr78458.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr78458.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr78458.c	(working copy)
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mcpu=8548 -mspe -mabi=spe -mlra" } */
+/* { dg-options "-mcpu=8548 -mspe -mabi=spe" } */
 /* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */
 
 extern void bar (void);
Index: gcc/testsuite/gcc.target/powerpc/pr78543.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr78543.c	(revision 250587)
+++ gcc/testsuite/gcc.target/powerpc/pr78543.c	(working copy)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
-/* { dg-options "-mcpu=power8 -O1 -mno-lra" } */
+/* { dg-options "-mcpu=power8 -O1" } */
 
 typedef long a;
 enum c { e, f, g, h, i, ab } j();