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[Patch ARM] Document the +crypto extension on CPUs.
- From: James Greenhalgh <james dot greenhalgh at arm dot com>
- To: <gcc-patches at gcc dot gnu dot org>
- Cc: <nd at arm dot com>, <richard dot earnshaw at arm dot com>, <nickc at redhat dot com>, <ramana dot radhakrishnan at arm dot com>, <kyrylo dot tkachov at arm dot com>
- Date: Fri, 14 Jul 2017 16:44:37 +0100
- Subject: [Patch ARM] Document the +crypto extension on CPUs.
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Hi,
We don't document the list of CPU names which can take a +crypto extension
in the ARM port. This patch fixes that oversight.
OK?
Thanks,
James
---
2017-14-07 James Greenhalgh <james.greenhalgh@arm.com>
* doc/invoke.texi (arm/-mcpu): Document +crypto.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 28070a6..56667fc 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -15636,6 +15636,14 @@ on @samp{cortex-r5} and @samp{cortex-m7}.
Disables the SIMD (but not floating-point) instructions on
@samp{generic-armv7-a}, @samp{cortex-a5}, @samp{cortex-a7}
and @samp{cortex-a9}.
+
+@item +crypto
+Enables the cryptographic instructions on @samp{cortex-a32},
+@samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a55}, @samp{cortex-a57},
+@samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75}, @samp{exynos-m1},
+@samp{xgene1}, @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
+@samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53} and
+@samp{cortex-a75.cortex-a55}.
@end table
Additionally the @samp{generic-armv7-a} pseudo target defaults to