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Re: [PATCH][AArch64] Allow CMP+SHIFT when comparing with zero
- From: James Greenhalgh <james dot greenhalgh at arm dot com>
- To: Sudi Das <Sudi dot Das at arm dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, nd <nd at arm dot com>, Marcus Shawcroft <Marcus dot Shawcroft at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>
- Date: Fri, 2 Jun 2017 16:33:30 +0100
- Subject: Re: [PATCH][AArch64] Allow CMP+SHIFT when comparing with zero
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On Thu, Mar 16, 2017 at 11:26:27AM +0000, Sudi Das wrote:
> Hi all
>
> The backend pattern for combining a CMP+SHIFT was missing out on a case when comparing with zero. This was happening because aarch64_select_cc_mode (SELECT_CC_MODE) was not returning the correct mode (in this case CC_SWP) which was needed to identify the combine. This patch adds this missing case.
>
> For the test case :
>
>
> int f3 (int x, int y)
> {
> int res = x << 3;
> return res != 0;
> }
>
> We are now generating (at -O2)
>
> f3:
> cmp wzr, w0, lsl 3
> cset w0, ne
> ret
>
> instead of :
>
> f3:
> lsl w0, w0, 3
> cmp w0, 0
> cset w0, ne
> ret
>
>
> Added this new test and checked for regressions on bootstrapped aarch64-none-linux-gnu.
> Ok for stage 1?
This is OK. I've applied it on your behalf as revision 248836.
Thanks,
James
> 2017-03-10 Sudakshina Das <sudi.das@arm.com>
>
> * config/aarch64/aarch64.c (aarch64_select_cc_mode): Return CC_SWP for
> comparision with zero.
>
> 2017-03-10 Sudakshina Das <sudi.das@arm.com>
>
> * gcc.target/aarch64/cmp_shifted_reg_1.c: New Test.