This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
[PATCH, rs6000] Fold Vector misc - fix testcases
- From: Will Schmidt <will_schmidt at vnet dot ibm dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>, David Edelsohn <dje dot gcc at gmail dot com>
- Cc: Segher Boessenkool <segher at kernel dot crashing dot org>, Bill Schmidt <wschmidt at linux dot vnet dot ibm dot com>
- Date: Wed, 17 May 2017 13:44:45 -0500
- Subject: [PATCH, rs6000] Fold Vector misc - fix testcases
- Authentication-results: sourceware.org; auth=none
- Reply-to: will_schmidt at vnet dot ibm dot com
Review and update the dg-require-effective-target clauses
for the fold-vec-* tests. Most of the tests affected here had
specified altivec when they actually needed VSX.
Also simplified the related dg-options statements to eliminate
redundancies.
The testcases have now been double-checked in p6,p7,p8le,p8be
environments. The test failures reported on AIX appear to match
what I observed in a P6 environment, which had Altivec but not
VSX support, so I expect this update to clear those issues up.
OK for trunk?
Thanks,
-Will
[gcc/testsuite]
2017-05-17 Will Schmidt <will_schmidt@vnet.ibm.com>
* fold-vec-div-float.c: Update dg-requires and dg-options statements.
* fold-vec-div-floatdouble.c: Likewise.
* fold-vec-div-longlong.c: Likewise.
* fold-vec-logical-ands-char.c: Likewise.
* fold-vec-logical-ands-int.c: Likewise.
* fold-vec-logical-ands-short.c: Likewise.
* fold-vec-logical-ors-char.c: Likewise.
* fold-vec-logical-ors-int.c: Likewise.
* fold-vec-logical-ors-short.c: Likewise.
* fold-vec-logical-other-char.c: Likewise.
* fold-vec-mule-misc.c: Likewise.
* fold-vec-mult-float.c: Likewise.
* fold-vec-mult-floatdouble.c: Likewise.
* fold-vec-mult-int.c: Likewise.
* fold-vec-mult-int128-p8.c: Likewise.
* fold-vec-mult-int128-p9.c: Likewise.
* fold-vec-sub-floatdouble.c: Likewise.
* fold-vec-logical-ors-longlong.c: Fix comment typo.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-float.c
index 8e8f645..47254ce 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-float.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-float.c
@@ -1,9 +1,9 @@
/* Verify that overloaded built-ins for vec_div with float
- inputs produce the right results with -maltivec. */
+ inputs produce the right results. */
/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-floatdouble.c
index 0559013..569467e 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-floatdouble.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-floatdouble.c
@@ -1,9 +1,9 @@
/* Verify that overloaded built-ins for vec_div with float and
- double inputs for VSX produce the right results with -mvsx. */
+ double inputs for VSX produce the right results. */
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec" } */
+/* { dg-options "-mvsx" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
index c37c648..e3f9e02 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
@@ -2,8 +2,8 @@
inputs produce the right results. */
/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-options "-maltivec -mpower8-vector -O3" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-char.c
index 021da58..d1f66f4 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-char.c
@@ -3,7 +3,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-options "-mvsx -O1" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-int.c
index ccac7d5..59a23e8 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-int.c
@@ -2,8 +2,8 @@
* with int inputs produce the right results. */
/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O1" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-short.c
index 8ee3206..805d345 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-short.c
@@ -2,8 +2,8 @@
inputs produce the right results. */
/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O1" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
index 283189f..7406039 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
@@ -3,11 +3,10 @@
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-options "-mvsx -O1" } */
#include <altivec.h>
-
vector signed char
test1_or (vector bool char x, vector signed char y)
{
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
index 11e98ae..a7c6366 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
@@ -2,8 +2,8 @@
* with int inputs produce the right results. */
/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O1" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
index ac532f5..7ca23fb 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
@@ -153,7 +153,7 @@ test6_nor (vector unsigned long long x, vector unsigned long long y)
// Codegen on power7 is such that the vec_or() tests generate more xxlor
// instructions than what is seen on power8 or newer.
-// Thus, an additional target close for the xxlor instruction check.
+// Thus, an additional target clause for the xxlor instruction check.
/* { dg-final { scan-assembler-times {\mxxlor\M} 6 { target p8vector_hw } } } */
/* { dg-final { scan-assembler-times {\mxxlor\M} 24 { target { ! p8vector_hw } } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
index 24f3a55..8352a7f 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
@@ -2,8 +2,8 @@
inputs produce the right results. */
/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O1" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
index 8726df6..7fe3e0b 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
@@ -3,7 +3,7 @@
* vec_nand) were added as part of ISA 2.07 (P8). */
/* { dg-do compile } */
-/* { dg-require-effective-target p8vector_hw } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
/* { dg-options "-mpower8-vector -O1" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mule-misc.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mule-misc.c
index 4bb6185..9b89118 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mule-misc.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mule-misc.c
@@ -1,8 +1,8 @@
/* PR target/79941 */
/* { dg-do run } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-mvsx -O2 -save-temps" } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2 -save-temps" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-float.c
index 619cd6e..46afc68 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-float.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-float.c
@@ -2,8 +2,8 @@
inputs produce the right results. */
/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -mvsx" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-floatdouble.c
index 685318a..59e9361 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-floatdouble.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-floatdouble.c
@@ -3,7 +3,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec -mvsx" } */
+/* { dg-options "-mvsx" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int.c
index 3359fbe..b536bce 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int.c
@@ -3,7 +3,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-options "-maltivec -mvsx -mpower8-vector" } */
+/* { dg-options "-mpower8-vector" } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p8.c
index a133c5d..fa615d4 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p8.c
@@ -4,7 +4,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_p8vector_ok } */
/* { dg-require-effective-target int128 } */
-/* { dg-options "-maltivec -mvsx -mpower8-vector" } */
+/* { dg-options "-mpower8-vector" } */
/* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */
#include "altivec.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c
index 96c9d01..e81ea5f 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c
@@ -5,7 +5,7 @@
/* { dg-require-effective-target powerpc_float128_hw_ok } */
/* { dg-require-effective-target int128 } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-maltivec -mvsx -mcpu=power9 -O2" } */
+/* { dg-options "-mcpu=power9 -O2" } */
/* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */
#include "altivec.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c
index c29acc9..116f15e 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c
@@ -3,7 +3,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec -mvsx" } */
+/* { dg-options "-mvsx" } */
#include <altivec.h>