Re: [PATCH GCC8][22/33]Generate TMR in new reassociation order

["Bin.Cheng" <amker dot cheng at gmail dot com>]

On Tue, May 2, 2017 at 3:09 PM, Richard Biener
<richard.guenther@gmail.com> wrote:
> On Wed, Apr 26, 2017 at 12:20 PM, Bin.Cheng <amker.cheng@gmail.com> wrote:
>> This is another one where context diff might help.  No code change
>> from previous version.
>
> This isn't a context diff.
Thanks for reviewing.  I used git diff -U20 to generate patch.  Maybe
20 is too small?

>
> Anyways, changes like using 'tmp' really interfere with creating a
> useful diff so it's hard
> to review no-op changes from the real meat.  I spot re-ordering and
> doing parts.offset
> in a different way first.
>
> I wonder if we can do better by first re-factoring fields of mem_address to how
> TARGET_MEM_REF is laid out now -- merge symbol and base and introduce
> index2 so that create_mem_ref_raw becomes a 1:1 mapping.
Probably.  Note the mapping shall be done in addr_to_parts?  Changes
in create_mem_ref tries to simplify address expression not supported
by current target into supported forms.

>
> Anyway, the patch looks fine (after much staring) but it could really need some
> more commenting on what we try to do in what order and why.
Simple comments added as in updated patch.  Will commit this updated version.

Thanks,
bin
>
> Thanks,
> Richard.
>
>> Thanks,
>> bin
>>
>> On Tue, Apr 18, 2017 at 11:49 AM, Bin Cheng <Bin.Cheng@arm.com> wrote:
>>> Hi,
>>> This patch generates TMR for ivopts in new re-association order.  General idea is,
>>> by querying target's addressing mode, we put as much address computation as possible
>>> in memory reference.  For computation that has to be done outside of memory reference,
>>> we re-associate the address expression in new order so that loop invariant expression
>>> is kept and exposed for later lim pass.
>>> Is it OK?
>>>
>>> Thanks,
>>> bin
>>> 2017-04-11  Bin Cheng  <bin.cheng@arm.com>
>>>
>>>         * tree-ssa-address.c: Include header file.
>>>         (move_hint_to_base): Return TRUE if BASE_HINT is moved to memory
>>>         address.
>>>         (add_to_parts): Refactor.
>>>         (addr_to_parts): New parameter.  Update use of move_hint_to_base.
>>>         (create_mem_ref): Update use of addr_to_parts.  Re-associate addr
>>>         in new order.

Attachment: address-iv_use-rewrite-20170221.txt
Description: Text document